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Research On Single Event Effect Of 3D Packaging ICS Based On TSV Interposer

Posted on:2022-04-18Degree:MasterType:Thesis
Country:ChinaCandidate:R W WangFull Text:PDF
GTID:2518306563977729Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Compared with the planar integrated circuits(ICs),the three-dimensional(3D)packaging ICs based on through silicon via(TSV)interposer technology(hereinafter referred to as TSV 3D packaging ICs)not only shortens the interconnection length and reduces the signal delay,but also has high integration capability of heterogeneous devices.It effectively solves the problem of insufficient storage and computing capability caused by limited space vehicle load.However,under the influence of space single event effect(SEE),the space electronic system will have random failure or even system collapse.The research on SEE of devices is of great significance to ensure the safe operation of spacecraft.Based on the Monte Carlo software package Geant4,a program framework is built to study the SEE of TSV 3D packaging ICs.The simulation of single event upset(SEU)effect of heavy ions and protons is carried out for a two-die stacked TSV 3D packaging static random access memory(SRAM).At the same time,the energy deposition straggling and range straggling characteristics of heavy ions in TSV 3D packaging ICs are analyzed.The main research contents and results are as follows:(1)Based on the Monte Carlo software package Geant4,a program framework for the study of SEE in TSV 3D packaging ICs is built,which mainly includes initialization process,particle simulation process,data processing and output process.The program framework is verified by using planar ICs.(2)The heavy ion SEU effect in TSV 3D packaging ICs is studied: the range-energy semi-empirical formula is modified,and the heavy ions selection standard for TSV 3D packaging ICs irradiation test is proposed.The influence and internal mechanism of the new TSV interposer structure on different linear energy transfer(LET)values and the same LET values but different kinds and energy heavy ions SEU cross section and multiple bit upset(MBU)rate are analyzed.The results show that the low energy,low LET value and low atomic number ions will reduce the SEU cross section of the lower stack die;the low energy,high LET value and high atomic number ions will increase the SEU cross section and MBU rate of the lower stack die,and the higher the density of TSV filling material is,the more obvious the effect is.At the same time,high energy ions with the same LET value will weaken the above effects.(3)The proton SEU effect in TSV 3D packaging ICs is studied: the effects of TSV interposer structure on the SEU cross section of low energy protons and high energy protons are analyzed.The results show that TSV interposer has shielding effect on low energy protons,and the peak value of SEU cross section of lower stack die is lower than that of top stack die,while the effect on SEU caused by high energy protons is smaller.(4)The energy deposition straggling and range straggling characteristics of heavy ions in TSV 3D packaging ICs are simulated and analyzed.The simulation method of ion energy deposition straggling is introduced;the energy deposition straggling between different sensitive volume and the influence of metal interconnection layer and TSV interposer on the energy deposition straggling are analyzed;the calculation program of ion range is verified and the effects of metal interconnection layer and TSV interposer on ion range straggling are also evaluated.The results show that the influence of ion energy deposition straggling on SEE will decrease with the increase of depth,and the metal materials in the device will further reduce the ion energy deposition straggling,but increase the ion range straggling.
Keywords/Search Tags:through silicon via(TSV) interposer, 3D static random access memory(SRAM), single event upset(SEU), heavy ion, proton, energy deposition straggling, range straggling, Geant4
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