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Research On Synchronization Technology Of Data Acquisition System Based Network On Chip

Posted on:2021-02-23Degree:MasterType:Thesis
Country:ChinaCandidate:Y WangFull Text:PDF
GTID:2518306554964909Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
Networks on Chip(NoC)completely solves the problems of low communication bandwidth,complex clock system,and poor scalability encountered in system-on-chip design,and is expected to become the mainstream technology in the field of new integrated circuit design.High-speed data acquisition plays an important role in the test system and is widely used in electronic measurement and other fields.The NoC-based data aquisition combines NoC and time interleaved data aquisition,which effectively improves the sampling rate and communication digital bandwidth,and achieves good results.But at the same time,it should also be seen that with the expansion of NoC communication scale,the network layout and wiring are too complicated,resulting in excessive communication delay of the entire NoC system,especially the complicated clock wiring,it is difficult to achieve global clock synchronization.In the time interleaved data acquisition,the clock accuracy has an important influence on the sampling data error.Therefore,this article will systematically study the NoC data acquisition system synchronization technology.First,the network clock synchronization method is studied,the principle of the WR synchronization technology is introduced,the meschronous clock method is adopted according to the characteristics of the NoC clock,and the clock link modeling and analysis is carried out on this basis,and based on the assumption of the same communication delay in bidirection link,Using request and respond of delay mechanism realizes the period synchronization,the phase deviation measurement realizes the phase synchronization,and gives the clock model,data set,and synchronization routing algorithm.Secondly,the router design and implementation is based on the network on chip clock synchronization method,with emphasis on the design of the synchronization controller and resource network interface.The synchronization controller runs a synchronization protocol and consists of a synchronization state machine,a phase interval measurement unit,a clock deviation calculation unit,and a clock timing adjustment unit.The resource network interface completes the transmission and protocol conversion of synchronous messages and data messages.The resource network interface is composed of a receiving unit,a sending unit and a synchronization support unit.Finally,the functional simulation and verification of the synchronization controller and the resource network interface are carried out.Using the designed router to build a 3*3 scale 2D-Mesh structure NoC system for timing simulation verification,the results show that the clock phase synchronization accuracy reaches sub-nanosecond level at 125 Mhz clock frequency,and the cycle synchronization accuracy is within 10 clock cycles.The clock synchronization method,router design,and resource network interface design proposed in this paper can meet the needs of NoC-based synchronization.
Keywords/Search Tags:network on chip, clock synchronization, WR, data acquisition, router
PDF Full Text Request
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