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Research Of IEEE1588 Precision Clock Synchronization Protocol And Implementation In The Core Router

Posted on:2016-05-21Degree:MasterType:Thesis
Country:ChinaCandidate:Y CaiFull Text:PDF
GTID:2308330503977234Subject:Software engineering
Abstract/Summary:PDF Full Text Request
The rapid development and popularization of 3G network technology give a higher requirement for the clock synchronization. The traditional GPS Satellite synchronization has some disadvantages such as high cost and low security, while IEEE1588 Precision Clock Synchronization is replacing GPS and dominating the clock synchronization field because of its high precision, low cost, high security and reliability. As the key device in the IP backbone network of the operators, it’s necessary to implement the function of IEEE1588 Clock Synchronization in the core router, and reach the precision of nanosecond level.Based on the research of the IEEE1588 standard, several factors which may affect the precision of synchronization are analyzed. Firstly, the timestamp of messages directly determines the calculate result of time offset. The timestamp point should be put as close as the physical layer to reduce the influence of protocol stack jitter to the accuracy of timestamp. Secondly, the transparent clock does not need to synchronize to other clocks, but differents in the rates between the master and the transparent clocks may result in errors in the calculations of resident time. Two methods are researched to solve the problem:frequency syntonization and frequency compensation. IEEE1588 synchronization algorithm also depends on the symmetry of link path. To get the accurate time offset, synchronization algorithm for the asymmetric path and asymmetry correction for the event messages are researched.In the implementation of clock synchronization in the core router, one chip of NetLogic is choosed as the IEEE1588 assisted chip. From the test result in the acual network environment, clock synchronization based on the hardware timestamp can reach the precision of nanosecond level. And in the asymmetric network, the precision is promoted dramatically after the asymmetric correction. The errors are avoided effectually in the network synchronization, and the synchronization precision is reached the operators’ demand for the core router.
Keywords/Search Tags:Clock Synchronization, Core Router, hardware timestamp, asymmetric path
PDF Full Text Request
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