Design And Implementation Of UVM-based USIM Verification IP

With the rapid improvement of integrated circuit manufacturing technology and design complexity. The rapid improvement of the complexity of the SoC result to verification much more difficult. In order to get more profits and market sharing, the major IC design houses of the world are trying to get a shorter design cycle of chip. Because more than 70% of the IC developing time is consumed by function verification. So decreasing function verification time has a priority. These IPs which were Integrated on chip must be fully verified in Top level verification for making sure top integration is correct. It is necessary to design a reusable verification environment for easy migrating in different project.The verification environment should be established at a high level abstraction for better automation. USIM is an essential IP in baseband chip. Top-level verification of USIM is time-consuming. So developing a verification IP for USIM is very meaningful. The work done in this paper is part of a baseband chip top-level verification tasks. After careful investigation and analysis of company’s current verification environment and flow, these following tasks have been done : 1) According to USIM top-level verification requirements, a new verificationenvironment which has high automation and good reusability has been developedbased on improving of previous verification environment. 2) Design and implement a USIM VIP structure and component using UVMverification methodology. 3) According to IC card standard protocol, We add many tasks and functions in driverand monitor in VIP for supporting ATR,T0,T1 mode. 4) Integrating the VIP into new verification environment and doing USIM top-levelverification using VIP. the new verification environment generates stimulus and checks response using VIP. The USIM VIP is designed based on OOP and all components of VIP are packed by class. It has many advantages such as high level abstraction, automatic stimulus generation and response checking After using the completed VIP and analysis of simulation waveform we can conclude:our verification IP can fully meet USIM top level verification requirements. The VIP has great advantages that can be easily reused and integrated. It shows that the new verification environment can greatly improve the automation and efficiency of verification. The verification life cycle of the project will sharply decreased. It will be a good example of other IP verification environment.