The Function Verification And Analysis Of DMA Based On UVM Method

Along with the high-speed development of IC technology and the requirement of the complex digital system in the field of digital communication,the scale of integration and the functional complexity of the chip show exponential growth.At the same time,the verification work has become an important and difficult part of the whole chip design process.How to ensure the completeness of the verification and improve the efficiency of verification has become key issues to determine the success or failure of the chip.Verification the object in this paper comes from a high performance M-DSP project which designed by our school independently.We verify the module level function of DMA component.Considering the complexity and diversity of DMA transmission modes,this paper builds the DMA verification environment based on the modeling idea of UVM verification methodology to improve verification efficiency.When UVM verification platform was constructed in this paper,we planned the overall structure of the verification platform according to the transmission characteristics of DMA and the design specification.Then the various components are modeled respectively follow the order of the function with structure diagram.After the UVM verification platform is completed,we need to debug the platform according to the requirements of DMA to guarantee the correctness of the verification environment.We used the function coverage and code coverage as judgment to ensure the completeness of the verification result.Comprehensive use of random excitation and directional incentive to complete the verification process.After continuous testing,final function coverage reached 100%,code coverage reached 98%,coverage collection to meet the needs of the functional verification.Building a highly efficient DMA verification environment with the UVM methodology is the core part of the study.Using this verification environment to complete the functional verification of DMA parts is the ultimate goal of the whole research.In the verification environment,the construction of the gold model and the arrangement of the comparison strategy are the key points of the platform construction,which is also the embodiment of the innovation of this paper.Compared with the traditional verification methodology,UVM methods has saved half of the time for verification.In enhancing the function verification progress while achieving the expected objectives.In addition,the each functional components in the platform have good reusability,also have guiding significance for other parts of the verification environment development.