Design And Implementation Of Multi-channel Precise Synchronous Arbitrary Waveform Synthesis Module

Multi channel arbitrary waveform generator can output multiple complex signals with adjustable phase relationship,which is widely used in the field of electronic testing.With the increase of the complexity of the measured object,precise synchronization and timing deviation adjustment between output channels have gradually become the focus of the research on multi-channel arbitrary waveform generator.Multichannel arbitrary waveform generator is generally composed of multichannel arbitrary waveform synthesis module and analog channel,and its synchronization index is mainly affected by arbitrary waveform synthesis module.Therefore,this thesis analyzes the factors that affect the multi-channel synchronization,studies the realization method of multi-channel synchronization,and completes the design of precise synchronization of four channel 3GSPS arbitrary waveform synthesis module.The main research contents are as follows:1.Multi channel synchronization analysis.The principle of direct waveform synthesis technology is introduced,and a multi-channel arbitrary waveform synthesis module model is established based on the structure.The synchronization influencing factors and conditions of DAC,data generation and trigger parts in the model are analyzed in detail.2.Overall scheme design.Combined with the relevant indicators of this design,the selection of DAC is analyzed,and the scheme of adjusting DCO clock to achieve synchronization is obtained according to the relevant data and clock requirements of B9129.Through the analysis,the data generation scheme of "FPGA + DDR3 SDRAM" is obtained,and the three schemes of data synchronization,such as adding synchronous FIFO,are compared and analyzed.By comparing the clock generation method with the index,the clock generation scheme of DDS exciting PLL and the phase adjustment scheme of multi-channel clock "coarse adjustment + fine adjustment" by clock distribution chip are obtained.3.Module hardware circuit design.According to the overall design scheme,AD9952 is selected to excite ADF4351 to generate the required variable clock.At the same time,the specific design parameters are obtained by calculating and analyzing the phase noise,and the specific method of LMK01801 to achieve phase adjustment is designed and verified.The selection of each module in the data generation part and the design of peripheral circuit are carried out,and the specific process of adjusting the DCO clock to achieve DAC output synchronization is described.4.Module logic design.This thesis introduces the design of the control interface based on the hard core of PCI and the interconnection interface based on axi4 bus.The asynchronous FIFO is used to realize the cross clock domain data reading and writing with AXI DMA as the core and the generation of descriptor chain.At the same time,the generation process and specific instruction analysis of descriptor chain are introduced.Finally,the design of waveform data transmitter is realized by using the oddr primitive,and the specific data mapping method is explained.Through the test,the maximum sampling rate of the four channel arbitrary waveform synthesis module designed in this thesis is 3GSPS,the maximum storage depth is 1GSa,and the synchronization accuracy between the four channels meets the requirements of100 ps,which has a certain role in promoting the development of domestic multi-channel arbitrary waveform synthesis.