Synchronization Analysis And Verification Of Arbitrary Waveform Generator Module Based On DAC Using JESD204B Interface

Arbitrary waveform generators are commonly used signal sources in test systems.Higher sampling rates,synchronization accuracy between channels,and channel timing capabilities have always been the development direction of arbitrary waveform generators.The DAC as the core device currently widely uses the JESD204 B interface to adapt to the high data rate corresponding to the high sampling rate.Since the JESD204 B interface adopts different methods,it also brings the problem of multi-channel synchronization.Therefore,this thesis analyzes and verifies the multi-channel synchronization problem of the arbitrary waveform synthesis module using the JESD204 B interface DAC.The main contents are as follows:1.Synchronization analysis of arbitrary waveform generation module.Based on the direct digital waveform synthesis architecture,the channel output synchronization is divided into two parts: the conversion synchronization of the DAC module and the data synchronization of the data generation module.Through the analysis of the principle of the JESD204 B protocol and the characteristics of the DAC,the key to obtaining the synchronization of the DAC conversion is the phase control of the sampling clock and the SYSREF signal and the selection of the elastic buffer release delay,and the influence of each factor on the synchronization accuracy is quantified.Through the establishment of a multi-channel data generation module timing model,the conditions that must be met by key signals such as the clock and trigger of each module to achieve data synchronization are analyzed,which provides a theoretical basis for the design.2.Channel timing adjustment analysis.According to the principle of waveform synthesis,the principle,adjustment range and adjustment resolution of various adjustment methods based on waveform points are analyzed.Considering the resolution limitation based on waveform point adjustment,the feasibility and adjustment methods of channel timing adjustment by adjusting the sampling clock by using the JESD204 B interface DAC are analyzed,and the adjustment range under the error-free data transmission is determined.3.The design and implementation of a high sampling rate dual channel precise synchronization arbitrary waveform generation module.Using FPGA+DDR3SDRAM+DAC architecture to realize direct digital waveform synthesis technology.Aiming at the frequency division characteristics of the JESD204 B related clock in the target DAC AD9166,a synchronization compensation method based on the waveform point delay is designed and implemented,and on this basis,the channel delay adjustment in the range of ±2ns is realized;under the condition of meeting the DAC data rate,DDR3 SDRAM is used to achieve a storage depth of 4G points,and asynchronous FIFO is used to make DDR3 SDRAM output continuous,and the synchronization control module designed to achieve synchronization of waveform data;based on DDS,jitter attenuator,clock distributor and PLL to complete 2.5GHz?5GHz frequency range,10 KHz adjustable step sampling clock and JESD204 B system required clock generation and synchronization.The analog fine-tuning unit and delay line based on the clock distributor realize the delay adjustment step of less than 1ps.According to the test,the maximum sampling rate of the arbitrary waveform generation module designed this time is 5GSPS,the storage depth is 4G sampling points per channel,the dual-channel synchronization accuracy range is 19 ps,which exceeds the25 ps of Tektronix AWG5202,and the channel timing adjustment range is ±2ns.The adjustment step is less than 1ps.