Font Size: a A A

Research And FPGA Implementation Of Channelized Receiver For Passive Localization

Posted on:2022-03-24Degree:MasterType:Thesis
Country:ChinaCandidate:C Z LiaoFull Text:PDF
GTID:2518306524992619Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
With the development of communication technology and the need of modern electronic warfare,real-time positioning signal processing is need for multiple different targets in the input wideband signal in passive location system.But the central frequency and bandwidth of these target are different,therefore,the channelized receiver with variable channel frequency and channel bandwidth for passive location is of great practical significance in the field of national defense and military.Thesis takes the channelized receiver in a passive positioning project as the main research object,by analyzing the advantages and disadvantages of time-domain channelization and frequency-domain channelization,selects the time-domain channelization method.On this basis,compares the two main implementation methods of time-domain channelization,that is,parallel digital down conversion technology and DFT filter bank technology based on polyphase decomposition,and finally decides to use the time-domain channelization method.The scheme of this method is implemented by using parallel digital down conversion technology,and this technology use CIC CFIR PFIR three-stage filter cascade.In this thesis,based on the simulation of the filter design in the digital down conversion,a digital channelized receiver which can work under the specific indicators is implemented by using FPGA.The center frequency of the digital down conversion in each channel of the channelized receiver can be set,because the decimation multiple of CIC filter is variable: from 4 to 2048,and the PFIR filter is designed with four different passband,FPGA can set the PFIR filter's coefficients dynamically according to the user's requirement.So it can be applied to a variety of different signals,and the maximum 64 channels channelization processing can be carried out at the same time.At the same time,it also has the function of remote time synchronization,and the accuracy is within 100 ns,which meets the corresponding requirements.
Keywords/Search Tags:passive location, channelized receiver, digital down conversion, FPGA, time synchronization
PDF Full Text Request
Related items