Hardware Design Of Multi-channel High-precision Data Acquisition Module

In the current rapid digital development,the accurate collection of some key quantities has become the key to our understanding of the world.The steps of data acquisition is particularly important,at present,the high precision data acquisition can be applied to multiple environments,radar monitoring,electric power,biological analysis,etc.,this design from the universality of application,design a support arbitrary channel scan,can be used in conjunction with the external control signal,realize the large voltage,small voltage and the electric voltage acquisition.The subject of the NI company high-precision data acquisition board card,achieve4 kinds of range input,the full range error is less than 0.1%,support 64 single-ended /32 channels of differential signal acquisition,single channel storage depth up to 64 k Sa,support continuous scanning mode storage,support a variety of trigger modes.At the same time,the multiplicity of FPGA technology and the expansion of PXI bus are combined to carry out modular design,which is more convenient to upgrade products.Reduce development time for this series of data acquisition systems.This thesis starts from the hardware design,combines the main functions and design indicators,formulates the general design scheme to meet the design requirements,carries on the theoretical analysis to each module,and then analyzes how to better complete the data collection function based on the index design.Specific contents include:1.Source analysis of high-precision design error: noise from amplifier,analog switch establishment time delay,noise introduced by reference voltage source,error on PCB board,etc.Plan the access mode of signal source.2.Signal conditioning circuit: it mainly includes input protection circuit,multiplexing circuit,programmable amplifier circuit and voltage comparison circuit.To make each signal easy to drive and easy to isolate,the 64 channels were gated,the selected signal combined with different range,according to the voltage return value to determine the specific amplification times.3.Data acquisition,storage and isolation circuit: FPGA is used as the main control chip to receive the commands of the upper computer,and the time-division instruction sends the switching action into the analog circuit.The digital isolation chip based on i Coupler magnetic isolation technology is used to isolate the digital signal from the analog signal to avoid errors.After the sampling is completed,FIFO structure is used to transmit data in two different clock domains,and the analyzed voltage sampling value is sent to the upper computer.Cooperate with the internal generated address instruction to realize the storage in scanning mode.Cyclone IV series is selected as the system pillar in the design.With sufficient array,simple configuration and low typical power consumption,Cyclone IV series is suitable for low-cost research.the design of digital interface is completed by using special PCI bridge chip,which supports PXI backboard trigger.Each single channel sampling process supports a maximum sampling rate of100 k SPS,determined by the upper machine release command.The system test results show that the important design functions and design indicators have met the design requirements.