Logic Design And Implementation Of Arbitrary Waveform Generator Based On Sampling Rate Conversion Technique

As a general signal source,the arbitrary waveform generator can provide stimulus for the electronic test system,simulate the actual signal encountered in the test process,and play an important role in the fields of electronics,radar,and communications.High sampling rate is the development trends of arbitrary waveform generators.Direct digital waveform synthesis technology synthesizes arbitrary waveforms by outputting waveform data point by point,which can restore the waveform details required by users to the greatest extent.It is a common waveform synthesis method for arbitrary waveform generators with high sampling rate.However,in order to achieve high frequency resolution of the output signal,a variable sampling clock with an output frequency of one octave and high frequency resolution is often required,which leads to uncertainty in the position of the image spurious of the output signal,making it impossible to obtain effective Filter out.In response to the above problems,this thesis proposes an arbitrary waveform synthesis scheme based on sampling rate conversion technique.By adding a sampling rate conversion module to the DDWS,the DAC works at a fixed sampling clock and the image spurs are controlled in a fixed range.The main work of this paper is as follows:1.Study on sampling rate conversion algorithm.Based on the analysis of the waveform synthesis method based on the sampling rate conversion technology,this paper puts forward three requirements for the sampling rate conversion module,that is,the sampling rate conversion multiple is arbitrary,the sampling rate conversion error is small and the sampling rate conversion rate is high.According to the index requirements,the arbitrary factor sampling rate conversion algorithm based on Farrow structure is studied.On this basis,the Farrow coefficient is analyzed to reduce the sampling rate conversion error and resource consumption.The Farrow structure parallel algorithm is analyzed to improve the sampling rate conversion rate.2.The logic design of waveform synthesis module based on sample rate conversion technique.Based on the parallel Farrow structure algorithm,the FPGA implementation structure of sample rate conversion module is studied.The structure includes six modules:shift register module,polyphase filter module,timing adjustment module,data selection module,polynomial calculation module and time parameter calculation module.By adjusting the order and the working clock of the six modules,the sampling rate can be improved and reduced respectively.In addition,a peripheral interface module is designed to implement the communication between FPGA and host computer,DDR3 SDRAM and DAC,and AXI crossbare IP and AXI DMA IP are used to implement the reading and writing control of waveform data.The test results show that the designed waveform synthesis module can implement the function of standard wave/arbitrary wave output,and can convert the waveform data under the sampling rate of 500MSPS?4GSPS into the waveform data under 2GSPS,which is higher than the sampling rate index of 33622 B and other instruments at home and abroad.