Research And Implementation Of Wideband High Resolution Frequency Synthesizer

With the advent of the Internet of things era,some fields(such as missile flight video monitoring field)put forward higher and higher requirements for low delay and low bandwidth video transmission.The delay of video real-time transmission system in the market varies from 200 ms to 500 ms,and the frame loss is serious due to the large transmission bandwidth.It can not meet the real-time requirements of the strict transmission field.In this context,this topic proposes the research of real-time video transmission with low delay and low bandwidth.On the other hand,in many low bandwidth scenarios,the transmission capacity of the network is seriously limited,and efficient compression technology is needed to control the bit rate.Moreover,the current monitoring system needs to be small and flexible,which requires video compression and transmission system to achieve miniaturization and low power consumption.Therefore,in view of the above problems,this paper focuses on the H.264 compression algorithm,and carries out in-depth research on real-time video coding and decoding transmission.In order to achieve low power consumption and miniaturization of the system platform,this paper studies the current mainstream video codec chip,selects the special ASIC chip hi3521 a as the H.264 codec core,completes the Linux transplantation,and builds the embedded hardware and software platform system.The real-time system of pal(720 * 576),720p601080p30 and other multi-resolution video coding and decoding transmission is realized.In the video monitoring transmission project,there is a high demand for real-time video.In order to meet the demand of real-time and high-resolution video remote encoding and decoding transmission,after deeply studying the H.264 compression algorithm,this paper proposes an optimized encoding and decoding algorithm to reduce the delay.The algorithm comprehensively considers the delay of image acquisition,encoding,transmission and decoding,and controls the code rate on a certain size,The system delay is effectively controlled.In order to realize one to many remote network transmission,this paper adopts UDP multicast and RTSP protocol,which reduces the network bandwidth and improves the real-time transmission efficiency.The system network delay is controlled at 100 ms.At the same time,in view of the poor network environment,this paper realizes the dual link load balancing video transmission,and uses FEC(forward error correction)algorithm to realize the packet loss recovery in the network,which improves the quality of video transmission.The main work of the system includes: consulting the relevant information of video codec transmission principle,research on Optimization Algorithm of reducing delay and packet loss bit error rate,research on Optimization of bandwidth reduction system,SOC chip selection,system hardware design,embedded codec program design,software design of related upper computer and joint debugging of software and hardware.The hardware design of the system takes hi3521 a as the core and carries peripheral devices(such as camera,display,DDR3,Ethernet card,etc.)to complete the design.Codec program is an embedded program developed and compiled on the PC(Ubuntu system)and run on the hardware development board.The design of two upper computer software is based on C++ language and GUI development program QT,which runs on PC to achieve bandwidth debugging and statistics of frame loss error rate.After hardware and software joint debugging,the system can meet the requirements of low delay and low bandwidth transmission index(delay less than120 ms,bandwidth less than 200KB/s at 1200-1500 bit rate).And the upper computer software of bandwidth debugging can realize the debugging of system bandwidth under different bit rate values.The upper computer software can realize the real-time statistics of frame loss and bit error rate,and verify the correctness of the statistics through the quality of video playback.