Research And Implementation Of RF Power Amplifier Based On CMOS Technology

Radio frequency(RF)power amplifier is located at the end of the transmitter,which consumes the most power in the transmitter and has a significant impact on the power consumption of the transmitter.With the development of integrated technology,the scaling down of transistors limits the saturated output power of RF power amplifier.The development of communication technique require the system to transform more data and have higher transfer rate.So the communication system adopts more complex modulation methods,such as orthogonal frequency division multiplexing(OFDM)Continuous phase modulation technology(CPFSK)and orthogonal amplitude modulation(QAM)which require RF power amplifier to have higher linearity and efficiency.Therefore,the research of RF power amplifier is of great significance.Based on the requirement of IEEE 802.11b/g/n protocol,a RF power amplifier for 2.4GHz WiFi chip is designed.Firstly,a traditional class AB power amplifier is designed with a turn ratio of 2/3 transformer to transform output signal from differential into single ended.Electromagnetic simulation is used for electromagnetic simulation and optimization to reduce the loss of transformer.The load of driver stage is connected in parallel with the cross coupled transistor which formed a negative resistance to improve the gain.The saturated output power and the 1dB compression output power of the power amplifier are 24.39 dBm and 18.85 dBm,respectively.The third-order intermodulation(IMD3)point is 27.88 dBm and the total gain of the three-stage circuit is 52.83 dB.The power added efficiency(at 1dB compression point)and maximum efficiency of power amplifier are 9.2% and 22.16%,respectively.Based on the traditional class AB power amplifier,a Class A&B RF power amplifier is designed to improve the linearity performance.In order to avoid the output impedance decreasing when the size of the transistor is too large,the transistors are divided into two groups and signals are amplified at the same time.The power combiner is designed by calculating the parameters and using electromagnetic simulation software to optimize performance.In addition,RC network is added between the power supply and the ground to improve the common mode stability.The performance can be seen from the post simulation that the saturated output power and1 dB compression power are 26.67 dbm and 21.59 dbm respectively.The typical value of IMD3 is-36.28 dBc and the gain of the three-stage circuit is 50.3dB.The power added efficiency of power amplifier at 1dB compression point is 10.19% and the maximum power added efficiency is 22.78%.Compared with the first version,the 1dB compression point is increased by 2.74 dB,which improves the linearity performance of the power amplifier.