Study Of High Mobility Channel SiGe Integrated Passivation And Its Device Characteristics

Fin field effect transistors(FinFETs)are currently the mainstream device structure in the 16/14 technology node in the semiconductor industry.However,as the size of transistor devices continues to shrink,the improvement of silicon-based FinFET technology has become increasingly difficult,and the introduction of new materials is also imperative.As an alternative channel material,high-mobility channels have received increasing attention in recent years.Among them,SiGe material can replace the channel of Si-based P-type FinFET due to its higher hole mobility than silicon material.But for new channel materials,especially the interaction with established silicon technology,there are many challenges.How to optimize the quality of the interface layer(IL)between the high-K material and SiGe is one of the main problems encountered.For the interface layer,passivation can effectively improve the quality of the interface layer.The current research progress is as follows:1.A 30 nm Si_0.7Ge_0.3 film is epitaxially grown on an 8-inch bulk silicon wafer,using two different high-K gate stack structures,HfO₂ and HfO₂/Al₂O₃,and perform a single step on different films for 30 minutes.The passivation process of O₃ oxidation compares the effect of O₃ oxidation treatment on the interface layer(IL)before and after ALD high-K materials.Experiments have found that 30 min O₃ oxidation treatment after ALD growth of high-K gate dielectric Al₂O₃/HfO₂ has the best effect,because the equivalent oxide-layer thickness(EOT)can be adjusted to 1.5nm and the interface state density can be reduced to 4.81×10¹² e V^-1cm^-2.2.In order to obtain better interface layer quality,after epitaxial Si_0.7Ge_0.3 film,Si-cap layer is epitaxially grown at the interface,and HfO₂ film is used for high-K lamination.The experimental results show that the interface state density of the sample treated with 1nm Si-cap can be reduced to 1.53×10¹¹ e V^-1cm^-2.The three elements of Si,Hf,and O in the interface layer are characterized by XPS.The composition of the interface elements on the Si-cap layer with different thicknesses Roughly similar,and compared with directly ALD high-K gate dielectric HfO₂ on SiGe,this method can effectively reduce the intermediate valence Si O_x and Hf-Si-O bonds and/or Hf-Ge-O bonds in the interface layer.3.In order to apply the Si-cap passivation method to the P-type Si_0.7Ge_0.3 FinFET,after the isolation layer(STI)is filled,the STI needs to be thinned until the Si_0.7Ge_0.3Fin structure is exposed.The Si-cap film is grown by selective epitaxial process on SiGe Fin,and when the temperature of the pre-baking process in the epitaxial process is adjusted to 720°C,the ideal SiGe Fin structure with Si-cap layer is successfully epitaxially formed.This conclusion shows that it is possible to combine FinFET and Si-cap passivation technology to verify the optimization of the interface layer of non-planar devices.