Design Of Large Array,Back-side Illuminated SCMOS Camera System Based On FPGA

Scientific cameras,as an important part of scientific detection equipment,have always been the focus of people’s research and attention.Most of the early scientific cameras used CCD,because compared with CMOS image sensors,CCD has superior performance,such as higher quantum efficiency and lower noise.With the advent of scientific CMOS(sCMOS)image sensors,this situation has been gradually broken.sCMOS has advantages of high dynamic range,high quantum efficiency,low noise,etc,which can satisfy the needs of most scientific applications.Therefore,many scientific cameras begin to use sCMOS instead of CCD.Due to the late start of the research on scientific cameras in China,most of the domestic scientific cameras are imported,but under the current international situation,imports is clearly not a long-term solution,to avoid being controlled by others,we must make more efforts to develop domestic scientific cameras.In this article,a camera system with FPGA as the control center is designed for GSENSE6060 BSI,a high-performance,large-scale,back-illuminated,domestic sCMOS image sensor,and the camera is tested according to EMVA1288 standard.The main work includes the following five aspects:1.According to the function needs of the camera system and the feature of the sensor itself,the overall planning of the camera system is made.The camera system is divided into two circuit board and the schematic is completed.Among them,the core component of the sensor board is the image sensor,which is responsible for generating image data,while the core component of the processor board is the FPGA,which is used for controlling the operation of the whole camera.2.Writing the logic control code of FPGA.FPGA is the control core of the camera,which is mainly responsible for driving the sensor,receiving the image data and communicating with PC.In the design,VHDL language is used to write the function code of each part of the camera,then,the logic codes are debugged and verified according to the working condition of the camera.3.The mechanism of high dynamic image synthesis is studied,and real-time synthesis of high dynamic image is realized by FPGA hardware.In high dynamic range mode,GSENSE6060 BSI can simultaneously output two images with high and low gain.Using this feature,the output image of the sensor is synthesized with high dynamic range,and the dynamic range of a single image is increased from 71.2dB to 91.6dB.4.Writing camera control software.In this camera system,UART interface is used for asynchronous serial communication between PC and FPGA.In order to facilitate man-machine interaction,the communication protocol between PC and FPGA is defined,and the control software of the camera is written in this paper.5.Camera performance test.To assess the overall performance of the camera,the camera is tested according to the EMVA1288 standard.The test results show that the imaging quality of this camera reaches the expectation given by the sensor manufacturer,and it is expected to become a domestic substitute for scientific cameras.