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Research On Imaging Key Technology Based On SCMOS-CIS2521F Chip

Posted on:2021-05-23Degree:MasterType:Thesis
Country:ChinaCandidate:Y WangFull Text:PDF
GTID:2518306455963439Subject:Electronics and Communications Engineering
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As low noise real-time image processing system has more and more requirements on image quality and processor operation speed,how to improve the processor operation speed and obtain high quality image has become one of the focuses in the field of low noise imaging.s CMOS scientific(CMOS)devices because of its special production process,in the inherited the advantages of conventional CMOS device also has the high dynamic range and low readout noise etc,and became one of the imaging system optimization detector,in addition the FPGA parallel processing characteristics and can be used repeatedly configuration of flexible way to make it a modern core device of digital image processing.Therefore,the low noise imaging system with s CMOS as detector and FPGA as control unit has become a hot topic in related fields.In this paper,the sCMOS-CIS2521 F produced by Xian Tong company is used as the photoelectric conversion unit,the FPGA of Xilinx company is the main control unit,supplemented by the low-noise imaging system built by other devices.Research on key technologies such as large-capacity image data caching and real-time image data processing in imaging.The main work includes the following aspects:1.sCMOS +FPGA+DDR+Cam Link hardware architecture was established as the verification platform of this paper through the analysis of the acquisition,control,transmission,display and other technical links involved in the imaging system.2.Completed the FPGA software design of the system,and established the software structure of detector timing sequence interface + image data conversion +image data storage + image data processing + high-speed image data Cam Link interface transmission.In addition,the two exposure modes(Rolling and Global)of the detector were studied and compared in terms of power-on,configuration and readout mode.Global exposure is realized based on Rolling mode,which makes the imaging application of the system no longer single.3.Based on the analysis of the data readout mode of the image sensor,a high-capacity image data caching mechanism of DDR2+FIFO is designed for its Global exposure mode,so as to efficiently complete the system's real-time reading and writing requirements for image data with high bandwidth.4.The noise of CIS2521 F low-noise imaging system and its sources were calculated and analyzed,the circuit noise,photon noise,signal to noise ratio and other parameters of the camera system are tested,and the noise level of the system is evaluated.5.The image denoising algorithm(gaussian filtering algorithm,median filtering algorithm,maximum filtering algorithm,minimum filtering algorithm and mean filtering algorithm),image enhancement algorithm(Laplace algorithm and Sobel algorithm)and FPGA implementation of the algorithm were studied,combining with the hardware characteristics of the system,the existing algorithm is improved and FPGA implementation is verified.MAE,PSNR,MSE,MSSIM and other evaluation indexes in the objective image quality evaluation method were used to evaluate the image quality processed by computer software and FPGA hardware,and the subjective image quality method is used to verify the objective evaluation results.Through the subjective image quality evaluation method and the objective evaluation method,the deficiencies of the design are clarified and the relevant Suggestions are given.
Keywords/Search Tags:sCMOS, FPGA, DDR, image processing, image quality evaluation
PDF Full Text Request
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