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Design And Implementation Of Full HD Video Compression,Storage And Transmission System

Posted on:2022-05-22Degree:MasterType:Thesis
Country:ChinaCandidate:J MaFull Text:PDF
GTID:2518306326982649Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
Video has become an important medium for information transmission in today's society,and is widely used in live broadcasting,security monitoring,telemedicine and other related fields.Full HD video compression,storage and transmission systems provide important research value for solving the problems of high bandwidth of video transmission and large data storage.Based on video compression coding technology,RGMII interface communication technology between embedded linux system and FPGA,large-capacity NAND FLASH storage technology,and high-bandwidth parallel LVDS transmission technology,this paper designs a software and hardware solution for full HD video compression,storage and transmission systems.Specific work includes:(1)The H.265 video coding algorithm and its characteristics are studied,a video compression coding scheme is designed based on the Hi Silicon Hi3516 A multimedia platform,and the H.265 algorithm is implemented using its MPP(media processing software platform)and MPI(MPP programming interface)to encode and compress video.(2)The rgmii interface communication technology between Linux system and FPGA is studied.The H.265 code stream generated by Hi3516 A is transmitted to FPGA by UDP protocol.(3)The structure characteristics of Micron's large-capacity NAND FLASH memory and the asynchronous timing operation mode are studied.Under the control of FPGA,the initialization,erase and read and write operations of NAND FLASH are completed,and the storage function of H.265 code stream is realized.The high-bandwidth 400-660 Mbps ten-bit parallel LVDS interface transmission technology is studied,and the transmission function of H.265 code stream is realized.(4)A test and verification platform was built to read the code stream data in NAND FLASH,and use the PHY chip connected to the FPGA IO port to transmit H.265 code stream to the PC through the network port.The host computer software receives and saves the code stream data.FFmpeg software decodes and evaluates the system's video compression performance.Use Xilinx online logic analyzer chipscope to capture internal data to verify the storage and transmission function of the code stream.The test results show that the system designed in this paper can realize the functions of full HD video compression,storage and transmission,the PC side decodes and plays the stream,the video picture is smooth,the FFmpeg decodes the stream data,the average compression ratio is about 141,the output bitrate is 4Mbps,compared with the original video,the PSNR value is38.The video storage function can realize 15 h bit stream storage,which is close to the theoretical value.Video forwarding transmission can achieve 660 Mbps bit stream transmission function through LVDS interface.
Keywords/Search Tags:Video compression, H.265, RGMII, Video storage, Video transmission
PDF Full Text Request
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