Memristor-based Non-volatile Memory Circuit Design

The rapid development of the information age provoked storage technology leaded by flash memory to update constantly.However,the flash memory based on the traditional semiconductor technology has met its bottleneck in research field,such as floating-gate thickness inconsistency with the reduction of device size,low storage life,high working voltage,slow writing speed,which urged researchers to work on storage technology with superior performance.Memristor is equipped with features of non-volatile,high density,low power consumption,compatibility with CMOS process,which gives its great potential in nonvolatile memory,large scale integrated circuits,artificial neural networks,pattern recognition and image processing.Due to its features of fast storage speed(<10ns),large capacity,low power consumption,small size,high durability(up to 1015 write times),high reliability and compatibility with CMOS,non-volatile memory circuits based on memristor have become the core in the field of the next-generation non-volatile storage technology.This work focuses the non-volatile memory circuit based on memristor,mainly from the following aspects:1.The mathematical simulation model of HP memristor was established by MATLAB software.The voltage threshold memristor model(VTEAM)was built and simulated in circuit-level by Cadence Allegro 17.4 software,which provides theoretical and simulated basis for design of non-volatile memory circuits paving the way for memristor in the following.2.Combining the advantages of the CMOS transmission gate like fast transmission speed,bidirectional transmission,strong anti-interference ability,wide input voltage range and fast writing speed with the advantage of 2T2 M memory unit so that it does not require a memristor resistance recovery circuit after read operation to further purpose and design reading circuit and decoding circuit of the novel 2T2 M memory cell circuit.The reading circuit is composed of comparison circuit and voltage induction amplifier circuit,and the decoding circuit uses memristor ratioed logic(MRL)structure,which can significantly reduce the circuit area.The novel 2T2 M circuit designed in this paper can significantly increase the circuit reading speed and reduce the circuit area.3.Aiming at the shortcoming of incomplete logic function of MRL combined with CMOS inverter,this work designed a universal logic circuit which can output six basic logic operations simultaneously.Compared with the traditional circuit,it has the advantages of less area,higher functional density and better noise tolerance.On the basis of the universal logic circuit,this paper proposed a design of 2T2 M memory and computing integrated circuit unit,which can realize the function of data storage and logic operation simultaneously.Each memory unit is composed of two 2T2 M memory units and eight MOSFETs,which can realize binary storage and six basic logic operation functions simultaneously.By using in-memory-algorithm or cell cascading,the integration circuit of storage and calculation based on 2T2 M can be combined into a full adder to further realize the mathematical operation function of the storage circuit.