Design And Estimation Of Approximate Convolutional Neural Network Accelerator

Thanks for the inborn error resistance of convolutional neural network(CNN),approximate computing has become a promising and hardware friendly technique to improve the energy efficiency of CNN.From the layer of algorithms,architectures,to circuits,there are many possibilities to implement approximate CNN.However,the complicated interaction between major design concerns,e.g.,power and performance,and the lack of an efficient simulator have generated suboptimal solutions of approximate CNNs through the conventional design method.In this thesis,several approximate strategies are explored in the design of CNN accelerator.Quantization is first performed to reduce memory requirements.Then accurate multipliers are replaced with inexact ones and the accuracy loss is recovered by introducing hardware imperfection to the training phase.Finally multiplications of zero and near-zero activations are skipped for further power saving.In order to estimate power and performance of approximate CNN accelerators quickly,an architectural level pre-RTL simulator is built.Given C code and the corresponding configurations,the simulator models accelerator by translating code trace to a dynamic data dependency graph(DDDG)and obtains the hardware behaviors by scheduling the DDDG.The power consumption of accelerator is then calculated based on hardware activities and power model of basic hardware units.An approximate CNN accelerator is designed based on Le Net.The accelerator is estimated in the pre-RTL simulator,which shows that it can obtain 32.1% power saving for Le Net with accuracy loss less than 0.5%.Besides,validation experiments demonstrate that pre-RTL simulator generates power estimations of less than 10% average error compared with those by RTL simulation under various configurations.This thesis presents a design of approximate CNN accelerator and estimates it in pre-RTL simulation,demonstrating the effectiveness of combination of approximate techniques on power saving.Besides,the pre-RTL simulator is flexible and can help evaluate other kinds of algorithms and approximate techniques,which should be explored and validated in the future work.