Research On SiC MOSFET Degradation Under Accelerated Stress

Silicon Carbide,as a new generation of wide band-gap semiconductor materials,has shown excellent electrical and thermal properties.Power devices based on SiC have high thermal-resistant,high voltage-resistant,low loss,high switching speed and other advantages.With the development of manufacturing technology in recent years,SiC MOSFET has been commercially applied in electric vehicles,solar inverters and other areas,it significantly improved the switching frequency and overall efficiency of equipment.SiC devices have become the trend of power electronics field to replace traditional Si devices.However,due to the large amount of interface traps in gate dielectric layer of SiC MOSFET,the potential degradation seriously affects the longterm reliable operation of the device.In addition,the traditional Si device packaging structure is still widely used in SiC MOSFET at present,but SiC MOSFET always suffers more severe thermal-mechanical stress,which easily leads to the package degradation.The poor quality of gate oxide and package seriously restrict commercial development of SiC MOSFET.At present,shortages and problems still exist in the research on reliability and degradation of SiC MOSFET,so further work is needed.The main study tasks and achievements of this paper are as follows:Firstly,the researches on package degradation of SiC MOSFET mainly focused on power modules currently,but few on that of discrete devices.Thus,a power cycling test platform is built to investigate package degradation of discrete devices,then the online parameter measurement-circuit and PC-based acquisition system are designed and implemented.Several groups of accelerated test schemes are developed to collect the degradation data of characteristic parameter,and then,the degradation process in different positions of device can be inferred from the analysis of parameters variation trend,and the package degradation is verified by means of ultrasonic scanning and optical observation.After that,this paper detailly discusses the effect of two main factors including junction temperature change and mean junction temperature on the degradation of package,and the degradation of solder layer resistance is also studied.The experimental results show that bond-wire degraded prior to die-attach solder and finally separated from chip and caused open-circuit fault.Higher mean junction temperature and higher temperature change both increased the thermal-mechanical stress of adjacent layer with different thermal expansion coefficient in the vertical package structure and led to accelerated degradation of package.Secondly,this paper extracts the life cycles of SiC MOSFET under different stress according to life cycles threshold standard.Based on these data and traditional analytical life model of power devices,three life models related to different stress are established.The models can be directly applied to predict the package life according to the working conditions of SiC MOSFET.The model with high accuracy provides a reliable evaluation and prediction method for thermal fatigue package failure.Lastly,currently studies on SiC MOSFET degradation always focus on the aging under single severe stress.However,in practical application of power electronic systems,SiC MOSFET suffers various stresses(high temperature,high reverse voltage)and always accompanied by high frequency switching stress(PWM).Thus,this paper built a commonly used PFC converter and designed strict working conditions to make the device operate within limit.The potential degradation is inferred by online parameter acquisition and offline sensitive parameters comparison accompanied by TCAD simulation to verify the degradation mechanism under multiple stresses.The results show that package and SiC die both degrade under multiple stresses.The root cause for package degradation is delamination defect at the bonding area.The TCAD simulation shows that the main reason for die degradation is the hot holes injection gate oxide under high electric field stress.