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Research On Power SiC MOSFET Device Optimized Design And Reliability

Posted on:2022-12-04Degree:MasterType:Thesis
Country:ChinaCandidate:Q H WangFull Text:PDF
GTID:2518306764479714Subject:Wireless Electronics
Abstract/Summary:PDF Full Text Request
As one of the third-generation wide band gap semiconductor materials,silicon carbide(SiC)material has very good physical and electrical properties,and a broad application prospect in the manufacture of power devices.Compared with Si MOSFET,SiC MOSFET has the characteristics of low conduction resistance,good thermal stability,fast switching speed and high blocking voltage,which is the current research focus in the industry.Thesis aims to design a 1200 V SiC MOSFET with high gate oxygen reliability.Firstly,the optimization direction of the device is determined through theoretical analysis.Based on Silvaco simulation platform,the key parameters of the device such as epitaxial layer parameters,p-well doping distribution,gate oxide layer thickness,JFET region and channel region width were simulated and the cellular optimization design scheme was determined.Due to the poor conductivity of the device under the basic structure,a new structure with low conductance resistance is proposed by introducing the current expansion layer CSL and the P buried layer of protective gate oxide layer.The structure improves the conduction capacity of the device on the premise of ensuring the reliability and voltage resistance of the gate oxygen,and the conduction resistance is reduced by nearly 30% compared with the basic structure.The differences between the new structure and the traditional structure in voltage resistance,conduction characteristics and the distribution of the gate oxygen electric field are compared to verify the feasibility of the optimization.Whereafter,the reliability of sample devices produced under the existing process is studied.The results of reliability assessment show that the samples have failure phenomenon in high temperature grid deviation assessment and temperature cycle assessment.Through failure analysis,it is found that the main mechanism of high temperature grid bias failure is that the thickness uniformity of grid oxide layer at the boundary of active region is poor,and some areas are weak and fail to reach the design value,leading to the device being broken down in advance when the grid bias occurs.In view of this phenomenon,the process was improved.By changing the mask and process flow,the original ion injection was carried out in two times,which reduced the doping concentration below the boundary of the active region,successfully improved the morphology of the gate oxide layer,and improved its thickness uniformity.The reason for the failure of temperature cycle examination is that the Ni-Si alloy layer formed after laser annealing is not ideal and the bonding force is insufficient.For this reason,the laser annealing process is optimized,the original primary laser annealing is changed to secondary laser annealing,the new step is to improve the surface morphology and increase the bonding force of the alloy layer while maintaining the original specific contact resistance.Finally,the test results show that the new process can significantly improve the pass rate of reliability assessment.Thesis starts from two aspects of structure optimization and process improvement,and carries out 1200 V SiC MOSFET simulation design,reliability assessment and failure analysis,which has certain reference value for domestic SiC MOSFET products to improve device reliability and achieve commercial mass production.
Keywords/Search Tags:SiC, MOSFET, Reliability, Gate Oxide Failure, TC
PDF Full Text Request
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