Memristive Neural Networks: Co-design Of Devices And Algorithms

In-memory computing based on non-volatile memory is one of the promising pathways to break through the traditional von Neumann bottleneck in the post-Moore era.As an emerging non-volatile memory,memristors have strong competitiveness in terms of operation speed,power consumption,endurance,and density of integration.Memristor crossbar arrays provide the parallel multiply-accumulate(MAC)operations based on Ohm's law and Kirchhoff's law,which shows huge acceleration for algorithms with intensive matrix multiplication,such as the traning and inference phases of neural networks,to overcome the bottleneck of computing power and energy efficiency under the traditional hardware neural networks solutions.In this thesis,focusing on the key issues of memristive neural networks,the implementation of memristor-based hardware neural networks is discussed systemly by the approach of co-research of hardware and software:improvement of the device analog properties by material modification with doping method and innovation of operation method,construction of simulation platform and the mapping approaches of algorithms for memristive neural networks.The main research results are as follows:(1)From the perspective of material modification,the LiSiO_x memristive synaptic devices are designed and fabricated with the dual ion effect of Li⁺and O^2-ions.The coexistence of long-and short-term plasticity is demonstrated on the LiSiO_x cells and the mechanism is explained by the I-V fitting method.For the long-term plasticity,the continuous 100-level conductance modulation behavior with low nonlinearity and high uniformity is obtained,which is beneficial from the migration of Li⁺ions.For the short-term plasticity,biological plausible paired-pulse facilitation(PPF)behavior is measured based on volatile high-resistance region.(2)Based on the implementation of the device researches,LiSiO_x memristor-based multi-layer perceptron(MLP)is simulated,and an"inner loop"algorithm optimization method is proposed.Taking MNIST handwriting recognition as the task,a recognition rate of 91.97%is obtained by introducing the ideal fitting model of the LiSiO_x memristor,and88.36%when considering the non-ideal factors of the device,which demonstrates the acceptable tolerance of the MLP to the inherent non-ideality of the memristors.Furthermore,the performance superiority of the LiSiO_x device is showed by comparison,and the effects of the number of conductance states,random fluctuation of states,and nonlinearity on network performance are analyzed by simulation.(3)Reaching to the integration of crossbar array,a mature 1T1R Hf O_x device is utilized as synaptic devices based on the investigation of single memristors,and an operation method of gate voltage confinement is designed to modulate the conductance tuning behaviors by taking the gate side as a current-limiter:high-precision 121-level conductance tuning behavior with high symmetry were obtained,stable and distinguishable quantized multi-level behaviors,as well as Spiking-Time Dependent Plasticity(STDP)behavior,while they are the basic properties for the application of neural network training and inference platforms,and spiking neural network,respectively.(4)Convolutional neural network(CNN)platform based on 1T1R devices is further simulated with the introduction of"weight range truncation",and the mapping scheme and operation method on 1T1R arrays is illustrated.A simple four-layer CNN based on the experimental 121-level conductance tuning behavior of 1T1R devices achieves a recognition rate of 92.79%for MNIST handwriting recognition.And a more detailed analysis of the non-ideal factors of the memristor is presented.What's more,a low-precision Le Net-5 convolutional network based on the quantized multi-level behaviors of 1T1R devices reaches recognition rates of 91.03%and 98%for online and offline learning,respectively,providing an effective solution for memristive hardware neural network in resource-constrained intelligent edge computing platforms.