Research On Key Technologies Of 0?10GHz Arbitrary Waveform Generator

Arbitrary waveform generator(AWG)is a universal signal source which can generate common waveform and user-defined signal.However,the applications of high frequency band such as high-speed wireless communication and radar have strict requirements on the bandwidth and frequency of output signal.In this paper,the design of AWG in the output band range of 0~10GHz is carried out,and the key technologies of broadband and high-frequency output are discussed.The mainstream AWG system is developed based on direct digital synthesis(DDS)technology,which can be divided into two stages: waveform generation and digital-to-analog conversion.In the process of DDS,the nonlinear errors of phase truncation,amplitude quantization and digital-to-analog conversion will affect the performance.Therefore,effective measures should be taken to reduce these non-ideal factors.FPGA with DDS soft core and RAM can achieve two kinds of signal generation,based on phase accumulation or waveform storage direct reading.The function of DAC is converting the waveform signal of digital input to analog waveform output.The conversion rate and dynamic performance directly affect the output signal quality of AWG system.To meet the design criteria of the AWG output band and signal rate,the DAC needs to be customized.On the basis of introducing the concept and indicator of DAC,this paper summarizes different types of DAC.Then a 10-bit segmented current-steering architecture suitable for ultra-high speed application is adopt in this case.The digital encoding method of the 10-bit DAC is thermometer decoding for the high 4 bits and binary code for the low 6 bits.In this paper,the current source switch unit module is designed innovatively.The multi-channel interpolation function is used in the module unit to improve the DAC rate,and the new DAC unit structure is explained in detail through the specific circuit and timing analysis.The design core of current-steering DAC is current source and switch.This paper explains the influence of mismatch and non-ideal effect on DAC dynamic performance from theoretical analysis and formula derivation.And gm/Id simulation design method is used to select transistor parameters and build circuit.The design and simulation of each important module of DAC are described in this paper,including current source array layout,ultra-high speed clock and data synchronization,random thermometer decoding,biasing circuit and different mode signal configuration.Based on Cadence platform,the 10-bit SMIC40 nm process DAC mixed-signal circuit is built in this project.The circuit simulation and layout are completed by AMS and Virtuoso Layout.Simulation tests on key performance index such as DAC establishment time and spurd-free dynamic range(SFDR)were carried out.The set-up time of DAC is 3.1ns,and the low-frequency SFDR is above 50 d B.The SFDR performance on the overall frequency band meets the expectation.In this project,the AWG system is formed by FPGA and DAC in the correct operation.The FPGA part achieves waveform editing and addressing reading,and then the DAC converts the digital input of FPGA into stepped waveform output under clock control.The AWG completes the function of outputing sine wave,triangular wave and sawtooth wave.the SFDR index of sine waveform is tested,and the non-ideal effect that affects the quality of waveform is analyzed in the end.