Research On Interconnection Technology Of FPGA Multicore SoC For Image Processing

As the digital image processing technology has been widely used in the field of space exploration, satellite remote sensing, aerospace, biomedical, industrial detection, resource survey, visual measurement, etc, research on image processing technology is increasingly showing its importance in theoretical significance and practical value. The main ways of image processing(and analysis) are improving image processing algorithm and integrating hardware realization means, At present, the image processing algorithm has been matured, and its complexity is fixed. Therefore, it is relatively difficult to improve the processing speed and meet the specified performance index by optimizing the algorithm, and the integration of hardware implementation methods became a hot research topic.In order to apply to portable devices, the implementation methods has gradually shifted from the universal computer to the micro processor, but the continuous increment of image pixel has put forward higher requirements for image processing system. The traditional single core processor has gradually shown its bottlenecks and the limitations on meeting the demand of high resolution image’s processing requirments, which promote the rapid development of multi-core technology. Multi-core processor becomes the main research direction of the development of modern Multi-core technology, which integrates the operational core of multiple resources on a chip to parallel processes and cooperative works, so the maximization of the communication efficiency and parallel computing as to improve the overall performance of the system. Therefore, it also provides a new way of solving ideas and research directions for image parallel processing, research on multi-core interconnect technology has become a key technology to realize image concurrent processing.The thesis take the SOPC technology as the core through Altera Nios II soft core processor, combined with FPGA technology of parallelism, streamlining and reconfiguration. According to the sharing media and communication mechanism, the thesis has discussed in detail the multicore interconnect architecture of shared bus, cross switch and NoC, and deeply researched the kernel communication mechanism using shared memory, general-purpose interface core and SG-DMA core. With face detection as the research object, by which the skin color screening model used to partitioning and parallelly processing the face images, the thesis constructs multi-core SoC image processor system through the Qsys tools in the FPGA chip. Through customizing and configuring IP core, the components connection is manually mounted to the Avalon bus, which include Nios II core, memory interface and I/O peripheral, The thesis compiles the qsys system content into the multi-core processor hardware module, designs the delay reset module and PLL module, establishes a tcl script file distribution(pin), completes the FPGA top-level hardware circuit of the multi-core processors system. Finally, according to BSP file matched with the target hardware, accomplishes the software design of multi-core processor system using the Nios II SBT for Eclipse.Results show that the thesis has built and accomplished the multi-core processor system for face detection using the Qsys which can be constructed and configured, and using Cyclone IV GXP4CGX150F31 as core hardware platform. After debugging and analysing, the results were outputed to the Nios II Console, and has obtained the face facial vertex coordinates. The processing result was displayed through MATLAB software, using rectangle function sketched the facial contour. The system is proved that runs well, and achieves the target of face recognition and recognition, it is successfully realized the FPGA multi-core SoC processor system for the parallel processing of the digital image. Using the multi-core interconnection technology which includes multi-core interconnection architecture and inter-core communication mechanism, a feasible solution for image parallel processing system is provided in the thesis, and it also laids a solid basis of theory and practice to further improve the actual operating performance of multi-core’s parallel processing and collaborative working.