Design And Implementation Of Dual-channel Video Compression Transmission System Based On TMS320DM8127

With the continuous development of image processing technology,video surveillance systems are widely used in intelligent transportation,safe cities,aircraft target tracking and many other fields,and play an important role in daily life and national defense construction.In addition to the video quality and clarity issues brought about by the high data volume,the compatibility of video sources in different formats brought by different application scenarios is also one of the issues that need to be resolved urgently.The video compression transmission system that is compatible with multi-format input has broad application prospects and market demand.Based on this background,this paper studies and designs and implement a dual-channel video compression transmission system that supports multiformat input based on H.264 video encoding.The system adopts FPGA + DSP processor architecture,uses TI's Davinci series TMS320DM8127 as the core processor,and is equipped with large-capacity and high-speed DDR3.GS2970 and TVP5151 are used to complete the collection of SDI video and PAL video.Signal switching and data format conversion of two video channels through FPGA,using DM8127 to compress and encode dual-channel video at the same time,and distribute SDI compressed video to multicast by RTP protocol,and transmit PAL compressed video to storage module by TCP protocol.This design uses DM8127 as the core to build a network video service terminal that integrates acquisition,compression,and transmission.Specifically,the main work of this article is in the following aspects.The hardware design work mainly includes the design of the video acquisition module.The original SDI video is converted into the BT.1120 format through the high-definition video decoding chip,and the original PAL video is converted into the BT.656 format through the standard-definition video decoding chip.The two channels of video complete the signal switching and data format conversion through the FPGA.2.The network transmission module adopts dual network redundancy design to ensure the stability of the system transmission.3.The design of the power module firstly analyzes the characteristics of the voltage required by each module,and selects the appropriate power conversion chip for the circuit design.Secondly,the integrated power management chip is used to control the power-on sequence of DM8127 through EEPROM programming.The software design work mainly includes 1.the design of the acquisition chip driver,the standard definition video decoding chip is controlled by the I2 C bus,and the highdefinition video decoding chip is controlled by the SPI bus.2.Construction and realization of video data Link,design and implement the dual-channel video compression transmission data Link required by this project.3.Realize video network transmission based on TCP and RTP protocols.After completing the design and implementation of the dual-channel video compression transmission system,this paper conducted a system test.The results show that the system designed in this paper supports both PAL and SDI video input,and can perform multicast and storage at the same time.The delay of video compression transmission is less than 300 ms,and the decoded video is free of jams and dropped frames.The video compression ratio reaches Around 125,and the stability of the system also meets the project requirements.