Electric Field Modulation Mechanism And Modeling Of SOI-based Lateral Power Devices

With the rapid development of power integrated circuits,lateral power devices,as the core devices of its popularization and application,have always been the research focus of scholars.SOI LDMOS has been widely used in power integrated circuit because of its small parasitic capacitance,low power consumption,small leakage current and good isolation characteristics.However,with the continuous research and application of SOI,new problems also arise.SOI high-voltage devices are greatly limited in their development and application due to the low vertical voltage withstand and the existence of self-heating effect.In this case,the theory of electric field modulation is proposed and widely used,which improves the performance of SOI LDMOS by changing the electric field of buried layer and then changing the surface electric field of drift region.In the meantime,from the innovation and optimization of the new device structure and the establishment and optimization of the numerical model of the lateral power device,the researchers have carried out in-depth research on the structure and performance improvement of the lateral SOI power device.In this paper,a two-dimensional analytical model is proposed for the first time for the APSOI LDMOS.According to the solution of two-dimensional Poisson equation and the boundary condition of the structure,the numerical model of SOI LDMOS based on electric field modulation is obtained.At the same time,an electric field modulation model considering both lateral and vertical electric fields is proposed.The model describes in detail the mechanism that the surface electric field can be modulated by changing the buried layer parameters and using the electric field modulation effect.Based on ISE TCAD device simulation software and MATLAB modeling software,under the same simulation parameters,the breakdown voltage of APSOI LDMOS is 140% higher than that of traditional SOI,93% higher than that of traditional SDDSOI(Silicon On Insulator structure with Step Doped Drift region)structure,and the fitting curve is consistent well,which proves that the electric field modulation theory has effectiveness.In addition,through simulation and modeling,the effects of the key structural parameters of APSOI,such as drift region thickness,dielectric constant,air window length and silicon window length,on the device performance change are studied,and the conclusion that the simulation results are consistent with the expected results of the model is obtained,which shows the accuracy of the numerical model of APSOI structure,and also has a great effect on the parameter optimization of electric field modulated SOI devices reference significance.Secondly,from the point of view of the existing substrate terminal technology,the working principle of the substrate terminal technology of SOI LDMOS is emphasized.Combined with the two dimensional numerical model of APSOI structure,the electric field modulation models of different SOI LDMOS structures with electric field modulation effect are unified,and the unified numerical model of SOI LDMOS based on electric field modulation is proposed,and through simulation analysis and modeling research further,the numerical model is further analyzed and optimized,and a unified model with good simulation results is obtained.Taking the Step Buried Oxide SOI(SBOSOI)structure,the Buried Oxide Double Step SOI(BODSSOI)structure and the Buried P-type layer SOI(BPSOI)structure as an example,the correctness of the model is more intuitionistic,and the essence of the electric field modulation effect of SOI based LDMOS is also revealed.It provides effective guidance for the design of new SOI LDMOS devices and the optimization of the same type structure from the aspects of physical structure and mathematical analysis.Finally,the design and research of SOI based LDMOS devices are carried out,and the performance of SOI LDMOS devices is verified by chip and test.Several commonly used preparation technologies of SOI materials are understood,and the fabrication process of SOI based LDMOS devices is described.Then the I-V characteristics and breakdown voltage of devices are simulated and analyzed by ISE software,and the relevant characteristics of the devices are tested finally.Combined with the ISE simulation results and the expected breakdown voltage results of the model,the experimental test results are compared and analysis.The research shows that the experimental results achieve the expected goal,and verify the accuracy of the numerical model again.