Design Of Multi-channel Signal Acquisition And Transmission Unit Based On Multi-core DSP

The multi-channel signal acquisition platform,as a signal collector,aims to achieve high-speed and real-time data acquisition and transmission for a multi-target positioning system.The platform can first realize 32 channels of 200 KHz sampling rate of AD data and 4 channels of ten types of serial data in parallel.The data is input to the internal DSP of the platform using the PCIE bus.The DSP can traverse and identify the data,buffer it,and encapsulate it into data that meets the transmission format This process ensures that when using Ethernet communication with the PC,the PC will not receive incomplete data packets,and the Ethernet speed can reach 133 Mbps.Therefore,the DSP selected by the platform must support PCIE,Gigabit Ethernet and other interfaces while having certain processing performance.In addition,since the tasks of the DSP involve time-consuming tasks such as loop traversal and multiple memory transfers,and considering the characteristics of the NDK development kit based on task priority execution,in order to prevent data loss due to preemption among tasks,this paper designs the use of multi-core The DSP performs the work described above.At present,after the data is collected and transmitted through the acquisition platform,the relevant positioning and communication algorithms are executed on the upper computer.Considering that the algorithm is mature and stable in the future,it needs to be integrated into the DSP for execution.Therefore,the selection of the DSP requires Reserve some space for expansion.Based on the above discussion,this paper selects the quad-core DSP TMS320C6674 from TI and the Cyclone IV GX series EP4CGX22CF19I7 N FPGA from Altera as the core processing device of the platform.Based on this,the minimum system,interface circuit,and related peripheral device circuit design are designed.The software has completed AD and serial data acquisition software,data identification and buffering on the FPGA side,construction of dual-end PCIE communication modules,data traversal on the DSP side to identify different types of data,grouping and buffering data,and The construction and transmission of mega-Ethernet TCP communication.Finally,the implementation process of power-on self-loading of multi-core DSP is studied.In the end of this paper,the system is jointly tuned to test the correctness of the design of each module,and the system transmission rate and packet loss rate are tested by long-term copying,and the correctness of the data received at the PC is verified.The test results prove that the system can Stable work for a long time to meet system design expectations.At the same time,the platform has good scalability and provides sufficient resources for future algorithm development without any changes to the hardware circuit.