Design Of Multichannel Spectrum Monitoring Digital Receiver Based On FPGA

With the continuous development of modern science and technology,the modern digital communication technology industry is developing rapidly,which is one of the important signs of human beings entering the information society.In the field of digital communications,digital receivers have an irreplaceable role as signal receivers.Based on non-cooperative communication,this paper designs a spectrum monitoring digital receiver that can realize multi-channel signal reception.At the same time,the functions of spectrum detection,signal recognition and demodulation of signals in 8 channels can be realized at the same time.It can also identify and demodulate signals of multiple modulation categories.The focus of this work are:1.Separate a single signal by dividing subchannels.2.A variety of modulation methods are implemented and demodulated at any sampling rate.3.Spectrum monitoring,parameter identification and demodulation of signals are implemented in two ways,online and offline.This paper first elaborates on the basic principles involved in digital receivers,including sampling theorem.Multi-stage filter design includes half-band filter principle,CIC filter principle and phase-locked loop principle,as well as several general-purpose Carrier recovery loop and timing loop design.Secondly,this paper carries out detailed scheme demonstration and simulation design for multi-channel digital receiver,including multi-channel spectrum analysis and signal demodulation.In the spectrum analysis simulation,the emphasis is on the implementation of multi-channel and the cascading filter in each channel for demonstration and simulation.In the demodulator simulation,the emphasis is on the demonstration,simulation and testing of the carrier recovery loop and the timing synchronization loop.Finally,according to the above scheme and simulation design,choose to implement its FPGA design on the hardware platform.In the spectrum analysis,a brief analysis of the data source,digital downconversion,and cascaded filter modules is performed,and the performance is described in conjunction with the debug waveforms in Chipscope.In the signal identification,the design of the data transmission module between FPGA and DSP is given,and the process of data transmission is introduced in detail.In the demodulator design,the design of the carrier recovery and timing recovery module for demodulation of different signal types is emphasized.Finally,the design of data cache and framing upload in FPGA is introduced.