Research On High-Resolution Space Camera Driver And High-Speed Data Transmission

High resolution imaging system plays an important role in many fields such as space remote sensing,geomatics and industrial measurement.In order to obtain remote sensing image with higher resolution,higher requirements are put on camera’s storage quantity transmission band width and sampling rate.CMOS sensors have been gradually applied in the field of space exploration owing to the steady improvement of fabrication capability.Domestic researches on high resolution and high-speed imaging are restrained by the import limitation,resulting in the relative inferiority in research level.Therefore,it is of magnificent practical value and theoretical meaning to conduct research on high resolution and high-speed space-borne camera system on the foundation of domestic chip technology.The research on high resolution and high-speed space-borne camera system conducted in this paper is based on a high-performance CMOS image sensor GL1608 which is developed by Gpixel Inc.The major work includes following aspects:（1）The general architecture of system is designed.Through the analysis of research status of the imaging system at present,the performance index requirements of the system are proposed,the system architecture is determined,and the selection of the required core components in the system is completed.The front-end collector uses GL1608 image sensor chip,the core processing chip uses Xilinx’s ZYNQ7000 series XC7Z035,the cache module uses DDR3-SDRAM,and the data transmission interface uses SFP+ optical modules.（2）The hardware platform of the system is developed.The image acquiring and signal processing circuits are designed individually regarding CMOS image sensor GL1608.The design,simulation and test of PCB is conducted in accordance with principals and regulations for high-speed PCB.（3）The system software based on ZYNQ-7035 is designed,and the sequential logic design of FPGA part and the register control design of ARM part are realized.Works are done in the sequential logic part adopts a top-down design mode,including top file CMOS drive control,as well as SPI bus control,data serialization and alignment control,digital image processing,DDR3-SDRAM read-write control and SFP+ optical communication sub-module.（4）The test platform for system is constructed and high-speed imaging experiment is performed.Core specification of the system such as MTF and SNR is tested and evaluated by means of currently existing test methods and experience.