Design And Implentation Of FPGA Subsystem In Lightweight UAV Data Link Terminal

With the development of information networking,autopilot and satellite navigation technology,the technology of small UAV has been widely used in both military and civil fields.As a key component of UAV system,data link is the lifeblood of the efficient and reliable communication of UAV system in many scenarios.But the traditional data link system cannot adapt to the rapid development trend of small UAV system and the task requirements under specific scenarios because of its large architecture and high-power consumption.Moreover,in the civil field,the industrial data link products suitable for small UAV are still very scarce.Therefore,a kind of high reliability and lightweight data link system is urgently needed to be carried on the small UAV to meet the application requirements of ground air two-way network data communication and more complex scenes.Based on the above considerations,the lightweight data link system I participated in as a technical backbone can ensure the high-speed signal transmission,and has the characteristics of miniaturization and low power consumption,which solves the key problems restricting the use of small UAVs in the project.This thesis focuses on the design and implementation of FPGA subsystem in lightweight data link system.In this thesis,firstly,the actual background and development trend of UAV data link are deeply investigated,the current research status and significance of the thesis are clarified,and the framework of the thesis is described.Secondly,the thesis completes the hardware platform design of the system,and divides the link into two parts,the signal processing module is constructed and implemented one by one.In order to ensure the correctness of the received data,the synchronization module and channel estimation module are designed and implemented to locate and recover the received data.On the basis of completing the functional modules of FPGA subsystem,this thesis also realizes the high-speed data interaction logic between arm and FPGA,which lays the foundation for the communication between the link and the host computer.Finally,this thesis verifies the function modules of FPGA subsystem and the transceiver processing of the link,summarizes the work achievements and shortcomings of the thesis,and studies and discusses the upgrading of the system and the follow-up improvement direction.