| This thesis reports on an investigation of successive approximation analog-to-digital converters approaching the theoretical limit of resolution and linearity, implemented using metal-oxide-semiconductor large scale integration (MOSLSI).;An experimental integrated circuit has been fabricated using 5-micron rule standard CMOS process. After the calibration typically performed each time the converter is powered up, the converter showed no larger than (+OR-) 0.65 lsb differential non-linearity and 0.8 lsb integral non-linearity at 15-bit level. The 15-bit conversion was carried out in 80 (mu)s.;A simple digital algorithm has been developed to correct the linearity error of monolithic CMOS analog-to-digital converters. A high degree of monotonicity and linearity is obtained without stringent component matching. |
