| In this thesis we study the interconnection networks and their switch architectures, the performance of different architectures, under the MIMD shared memory environment, using both simulation and analytical methods.;The networks we study are constructed with a basic building block, a switch element. Quite a few alternatives are proposed in designing the switch element. Naturally, different switch architectures give different performance. We study the performance of different switches with both analytical methods and extensive simulations. We also propose a multiple hand shaking signal switch architecture (which is also referred as 2-CTS single switch for 2 by 2 switch) which gives the maximum performance.;Various interconnection networks and interested issues related to them are reviewed in the thesis. We propose a new class of interconnection networks called F networks. In comparison to traditional multi-stage network, F networks provide faster communications among nodes within a cluster. Also extra routes available in the F network fault-tolerant.;Under the uniform traffic model, Kruskal & Snir ((83)) discovered that different stages of buffered omega network experience about the same queueing delay for moderate load. Based on simulations and analysis, Kruskal, Snir & Weiss ((86)) established a formula for calculating network delays under moderate traffic. From our simulations we surprisedly discovered that the Kruskal-Snir-Weiss formula holds only of the forward path delay of the networks, the return path delay is actually substantially less than the delay of the forward path. We complete the network performance formula by extending the Kruskal-Snir-Weiss formula to include the return path. We also analyze the network performance under "hot spot" traffic and obtain analytic results on the performance attained. |
