RF/CDMA interconnect for re-configurable VLSI systems

In the past three decades, the performance of integrated circuits has been improved dramatically due to the reduction of semiconductor device dimensions. Nevertheless, the performance bottle neck of the future IC will be limited predominately by the signal transmission speed of interconnects. Recent studies clearly indicated that conventional approaches being used to solve problems imposed by hard-wired metal interconnects will eventually encounter fundamental limits and will impede the advance of the future integrated circuits and systems.; Conventional high-speed digital integrated systems use time multiplexing or de-multiplexing techniques to speed up the data transmission rate and increase the system data throughput. However, due to the bandwidth limitation of the transmission channels and the crosstalk between physical wires, the data transmission speed is limited by the quality of the channel. Additional disadvantage of the timing multiplexing interconnect system is that the transmission slots are fixed even when multiple users are present in the system, so a complicated timing control machine is needed to conduct the timing slot allocation. To alleviated the limitation of physical channels and increase the flexibility of the interconnect, we propose to use a novel RF/wireless Interconnect system for future high performance re-configurable VLSI applications.; In this thesis, we present several RF/wireless interconnect designs in CMOS technology to achieve Giga bits per second data rate with seamless re-configurability on-the-fly, which include a CDMA (Code Division Multiple Access) interconnect systems and a FDMA (Frequency Division Multiple Access) interconnect system. These approaches emulate the communication approaches between people in the real world and could be implement among different digital, analog or RF systems. Since these techniques are compatible with the mainstream IC technology and has the potential to achieve higher performance with the scaling of the IC technology, they could serve as the intelligent interconnects in the future smart electronic systems. The analytic model of the physical RF-interconnect system will be discussed first, followed by measurement results from several interconnect demonstration vehicles. Then the design of CDMA and FDMA interconnect interface circuits will be discussed as well.