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Lower cost and better quality manufacture test of digital circuits

Posted on:2005-09-22Degree:Ph.DType:Thesis
University:The University of IowaCandidate:Tang, HuaxingFull Text:PDF
GTID:2458390008978645Subject:Engineering
Abstract/Summary:
In this thesis, several new design-for-test (DFT) and test generation techniques are presented to deliver low cost, high quality manufacture tests. Specifically, we investigate the following issues: test stimuli compression, test response compaction and defect alert tests with high defect coverage.; We first investigate test stimuli compression techniques to reduce test data volume and test application time for designs with multiple scan chains. A new method is presented which uses a reconfigurable switch to apply tests from a limited number of external inputs to a large number of internal scan chains. The reconfigurable switch allows different subsets of scan chains to be connected to the same external input at different times, thus allowing varied tests to be applied to the circuit to achieve 100% test efficiency for ISCAS 89 circuits with a much higher reduction of data volume of test stimuli compared to the earlier methods. A programmable switch based on Omega networks is also presented to make this scheme design independent without sacrificing the test stimuli compression ratios.; Next the compaction of test response, especially for the complex industrial designs with large number of unknown values in the fault-free test response, is investigated to maximize the reduction of overall test data volume. Three techniques, called selective filling, selective chains masking and selective multiple chains observation, are presented and seamlessly incorporated into an enhanced space compaction scheme to effectively and efficiently handle the unknown values. In general, a very large test response compaction ratio can be achieved with a minimal increase in test vector count and without compromising the test quality.; The last part of this thesis is devoted to generating high quality manufacture test. A new ATPG algorithm, called defect alert ATPG, is presented to improve coverage of both static and dynamic defects with minimal effects on test pattern generation time, test pattern count and achievable test data compression ratios. A new measure of test quality is also proposed and experimental results show that this measure gives a better estimate of incremental defect coverage than an earlier proposed measure.
Keywords/Search Tags:Test, Quality manufacture, Presented, Defect, New
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