| A new form of MOS Current Mode Logic (MCML) is introduced which allows the drive current and voltage swing of the logic gates to be adaptively controlled, enabling real-time adaptation to achieve an optimum balance between power and speed. The design of a logic library in a 0.18mum CMOS process is described, and an adaptable bias controller is developed to ensure independent control of the bias current and voltage swing. Expressions predicting the stability and transient performance of the controller are derived and used to determine design guidelines for the bias controller. The Adaptable MOS Current Mode Logic (AMCML) logic developed in this thesis is used to construct a multi-band frequency divider capable of adjusting its power dissipation based on the required band of operation. The AMCML bias controller and frequency divider were successfully built and tested and confirm the ability of the AMCML-based frequency divider to trade speed for power when switching from one frequency band to another. |
