| The Internet of Everything or Things is driving towards a densely connected wireless world where more than 30 billion devices are expected to be interconnected. These are being enabled by scaling of Complementary Metal-Oxide-Semiconductor (CMOS) technologies. However, RF circuits, in particular, voltage controlled oscillators (VCO), are still plagued by their size, frequency sensitivity to nearby circuits or materials for some applications and process variations. In this thesis, these issues are investigated and design techniques to mitigate are proposed and demonstrated.;By optimizing the design of inductor in a VCO for performance without the area constraint, and by fully filling the area underneath the inductor with other necessary components, the VCO performance including area efficiency are simultaneously improved. Exploiting this, a 4.3-5.6 GHz VCO with an area of 14,400 mum2, and FOMA and FOMTA of -202 and -210 dBc/Hz, respectively has been demonstrated in a 65-nm CMOS process. The VCO performance is further improved by using NMOS PMOS cross coupled pairs and operating at 16 to 19 GHz, which are near the frequency at which the LC tank Q the maximum in the CMOS process. The output is frequency divided by four to generate signals at 4 to 4.8 GHz. These reduce the circuit area by ∼3X. The circuit including all the components achieves FOMA and FOMTA of -209 and -215 dBc/Hz, respectively.;A measurement setup including a metal plate probe mounted on a micrometer controlled positioner is used to quantify the effects of surroundings to VCO characteristics. Including a metal-ring shield around the inductor of LC-VCO and placing components underneath the inductor to reduce the circuit area lower the sensitivity of VCO performance to surroundings. A 4.3-GHz VCO using an addressable array of cross-coupled minimum size NMOS transistor pairs for post fabrication selection is demonstrated in 65-nm CMOS. An algorithm based on Hamming distance using the phase noise measurements of ∼1,500 array combinations was used to identify combinations that have the record breaking phase noise of -130dBc/Hz at 1-MHz offset from a 4.3-GHz carrier while consuming 5.2 mW from a 1-V supply. |
