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Design and analysis of CMOS shunt-peaked distributed current commutating mixer

Posted on:2006-06-17Degree:Ph.DType:Thesis
University:Rutgers The State University of New Jersey - New BrunswickCandidate:Ou, JackFull Text:PDF
GTID:2458390008450501Subject:Engineering
Abstract/Summary:
Wideband balanced current commutating mixers are useful for coherent optical heterodyne receivers, electronic warfare (EW) systems, amplitude/phase tracking systems, direct-digital modulation and demodulation measurement systems, and wideband reception of high data rate digital signals. In these applications, mixers which possess excellent balance and high conversion gain over a bandwidth from DC to an upper band edge in excess of 10 GHz are highly desirable.; Recent advances in low-cost CMOS fabrication process have rendered them appropriate for the realization of high-frequency analog current commutating mixers, traditionally implemented in more expensive III-V technologies such as Gallium Arsenide and Indium Phosphide. The advantage of these CMOS implementations is that they can be easily integrated with low frequency analog and digital circuitry.; The focus of this thesis is on the analysis and design of a distributed current commutating mixer in 0.13 um CMOS technology. A theory which provides both the basic operational understanding and the performance limitations of distributed and non-distributed current commutating mixers is presented. The proposed theory suggests that while the performance of conventional current commutating mixers can be improved by a distributed implementation, parasitics, which cannot be distributed by the distributed principle, can still adversely affect the overall bandwidth of the device. Maximum bandwidth is achieved when the distributed principle is implemented in conjunction with shunt peaking to mitigate effects of non-distributable parasitics.; With the insight gained from the general theory of distributed current commutating mixers, this thesis presents a distributed current commutating mixer implemented in 0.13 um CMOS technology. The LO power of -4 dBm is the lowest reported in the literature. An upper bandwidth of 13 GHz is demonstrated. The upper bandwidth to transition frequency ratio is the highest reported in the literature. The die area of 0.275 mm x 0.375 mm is the smallest reported in the literature. The power consumption of 4.8 mW is the lowest reported in the literature.
Keywords/Search Tags:Current commutating, CMOS, Reported, Literature
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