Broadband CMOS power amplifier for IEEE 802.11 a/b/g wireless LAN transmitters

In recent years, the research of integrated circuits for RF transceivers has been focussed on achieving higher level of integration. Since the successful of the implementation of monolithic transceivers, more and more attentions are drawn to the development of multi-standard transceivers for even higher level of system integration and flexibility to communicate using existing infrastructures when moving to different locations or when the access of networks using different communication standards is needed. While other multi-standard RF transceiver components are under intensive research, little attention is received for the multi-standard power amplifiers because of the power efficiency concerns and the very different specifications for power amplifiers using different standards. For an RF CMOS power amplifier, the problem is even more severe because of the intrinsic limitations of the process such as low breakdown voltage small transconductance compared to the other process.; This work targets power amplifiers for IEEE 802.11 a/b/g because of their similar linearity and output power requirements. A broadband solution is proposed in this thesis. To date, most of the PA designs attempt to maximize the quality, factor of the on-chip elements such as spiral inductors to minimize the power efficiency degradation while the others try to use bondwires or off-chip elements as a work around. This thesis attempts to describe a different approach by adopting Low-Q inductors to achieve broadband power amplification for multi standards with reasonable power efficiency performance. The basics, working principles, design, simulation and measurement result of the power amplifier as well as the performance comparison with the other power amplifiers in the literature and in the market are described in this thesis.; A broadband CMOS power amplifier for 2.4/5 GHz band was designed and implemented using the TSMC 0.18 mum technology. The simulation results shows a bandwidth of 3.5 GHz and maximum output power of 19 dBm with a peak efficiency of 14%. The measurement results shows a bandwidth of 3 GHz and the maximum output power of 21 dBm with a peak efficiency of 30%. The discrepancies between the simulation and measurement results are due to underestimation of the parasitics of the signal paths and the process variations.