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Fault tolerant quantum-dot cellular automata majority gate design

Posted on:2007-11-07Degree:M.SType:Thesis
University:Oklahoma State UniversityCandidate:Patitz, Zachary DanielFull Text:PDF
GTID:2458390005489854Subject:Computer Science
Abstract/Summary:
Scope and method of study. The purpose of this study was to examine the fault-tolerance of Quantum-dot Cellular Automata structures, namely the Majority gate. The focus of the fault-tolerance of these structures was under differing radii of effect distances. The structure of the majority gates is pivotal to the construction of complex arrays in QCA. The fault-tolerance of majority gates in QCA greatly impacts the flexibility of the clocking scheme and, therefore the entire design of the array. Testing was done with the aid of a simulation tool using realistic environment variables.; Findings and conclusions. The proposed fault-tolerant majority gates were found to function appropriately under a single clock control. The impact of this finding was greatly increased clock zone placement flexibility as well as a reduced amount of clocking zones for a simple carry-look-ahead full-adder.
Keywords/Search Tags:Majority
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