A model for programming characteristics of SONOS type flash with high-kappa dielectrics

Silicon Oxide Nitride Oxide Silicon (SONOS) FLASH memories have recently gained a lot of attention due to better retention and scaling opportunities over the conventional Floating Gate FLASH memories. The constant demand for device scaling, to attain higher density, higher performance, and low cost per bit, has posed charge leakage problems. SONOS type devices with high-kappa storage layers and/or high-kappa blocking oxide have been proposed to alleviate the demand for constant tunnel oxide scaling. In comparison to conventional FLASH, these devices operate at lower voltages, exhibit higher programming speeds, comparable retention times, less over-erase problem and better compatibility with low power CMOS logic.; The objective of this thesis is to develop a comprehensive model which can be used to obtain the programming characteristics, i.e., shift in threshold voltage vs. program time, for "trap-based" FLASH memories with high-kappa dielectrics. The proposed model is used to obtain the programming characteristics for SONOS type devices. The results from this model are compared with the experimental results and in general the agreement is good. For SONOS type devices with high-kappa blocking oxides, the density of available nitride traps for charge storage is shown to have a linear dependence with the potential energy difference between the silicon substrate and the nitride storage for different gate biases. The model is also used to get an estimate of available trap energy levels in the nitride layer as a function of applied voltage.