Modeling and synthesis of communication software for multi-processor systems-on-chip

The advances of chip manufacturing technology have increased the capacity of embedded systems and made Multi-Processor Systems-on-Chip (MPSoC) a reality. While MPSoC offer superior performance over single core systems, the long design time of such large systems limits the appeal and broader usage of MPSoCs. Meeting strict performance requirements under pressures of shortening time-to-market and growing system complexity creates a productivity gap of what is possible to achieve versus what is settled on as the product is completed. Closing this productivity gap is a constant challenge in embedded system design. There is no panacea for increasing the productivity of embedded systems. The range of proposals include raising the level of modeling abstraction and automating the design process, or parts of it, so that the tedious and time consuming aspects of system design are removed from the designer's plate. Furthermore, MPSoC design introduces the need for parallel programming tools that traditional design approaches did not need to support. To cope with parallelism, modern approaches propose starting the design process with a MPSoC platform template containing pre-defined computation components (IPs), communication system (bus-centric, point-to-point or broadcasting network) and system layout (SoC, MPSoC or Networks-on-Chip).;In this dissertation, we use a Platform Aware Design methodology, which introduces the template of the MPSoC platform early in the design process. We define the design flow with (a) clear and unambiguous input models used for system capture, (b) parameters that represent design choices determined during design space exploration, and (c) refinement methods utilized in system synthesis. The template-based design has the potential of greatly speeding up the design process by limiting, to a certain degree, the freedom of design exploration. However, balancing the trade-off of quickly reaching the satisfactory design versus covering the majority of the significant design space is always under the control of the designer.;Our design flow has been prototyped with the Embedded System Environment (ESE) tool and tested on a range of applications representing control-flow, data-flow and broadcasting embedded systems. System capture determines the appropriate modeling for each type of application, while the design exploration phase allows the designer to quickly search the design space and explore various design options. The contributions described in this dissertation include classifications of both inputs to system capture, Application Models and MPSoC Platforms, as well as the Application-to-Platform mapping algorithm. Furthermore, the described system design case studies of process networks (H.264 Encoder) and broadcasting networks (Temperature regulator application) validate our approach to design exploration on industry size designs.;After the modeling phase yields the satisfactory design, the model can be automatically generated with the developed refinement tools. The dissertation describes the communication SW synthesis and provides the algorithm for automatic generation of communication SW. Our experiments with the design of MP3 Decoder demonstrate the feasibility and effectiveness of our approach to system synthesis. The obtained results show that the desired productivity gain can be achieved without sacrificing the design quality.