Conception d'un systeme de test et de configuration numerique tolerant aux pannes pour la technologie waferic

The goal of this master project is to design, implement and validate a new system able to control the WaferIC, a Wafer Scale Integrated Circuit (WSIC). More specifically, the project objective was to design the software/hardware interface, design and implement an embedded fault-tolerant control system and implement from scratch an environment in SystemC for functional verification. Moreover, the ASIC synthesis is applied on the VHDL code to fabricate a test chip to validate the circuit.;The specific contribution of this master project consists of designing a fault-tolerant system to test and configure the WaferIC, to implement a verification environment coded in a mixed language SystemC/VHDL. This environment implements a software/hardware interface for the WaferIC and the design of a new test and diagnosis methodology for the reconfigurable network. Fault tolerance is an important issue for this class of circuit for economic reasons, and to reach the quality required for this application.;This document reports results obtained while testing and validating a test chip (1x1 mm2) that has been fabricated. Those results proved that the WaferNet concept works properly and the fault tolerant test and configuration system works as expected.;A new approach for rapid prototyping of digital systems is in development at several universities, including Ecole Polytechnique de Montreal, through the "DreamWafer(TM)" project. The goal of this new system is to interconnect all the digital pins of a set of discrete chip at the system level by using a reconfigurable network called WaferNet. This interconnection network is deployed over the active surface of a whole wafer. This wafer scale integrated system called WaferIC aims at implementing a form of reconfigurable PCB that is able to reconnect the digital pins of discrete chips at will. User's ICs deposited on the active surface of the wafer are detected by an array of tiny reconfigurable "NanoPads" that can redirect the signals in the WaferIC's internal network or feed the user's IC pins with data and power.