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Research On Burn-in Test System Suitable For High Speed Chip

Posted on:2021-05-04Degree:MasterType:Thesis
Country:ChinaCandidate:Y YangFull Text:PDF
GTID:2428330629451046Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the advent of the era of 5 g,optical communication market demand for light chip also gradually increased,and the proportion with time continues to rise while there are a lot of domestic optical communication enterprises at present stage,but there are many short board in chip,chip independently provide ratio is very low in our country need to spend more money to import foreign chip,chip design and manufacturing development relies on the chip test,through the test can accurately and quickly found chip design limited,provides direction for chip design improvement.In view of the difference between high speed optical chip and normal optical chip,the whole system can be improved in measuring accuracy and reliability by studying each part of the aging test system,so that it is widely used in the production of high speed optical chip.The main contents of this paper are as follows:(1)This paper introduces the key points and basic principles of high speed optical chip in aging test at present,and LD chip is taken as the research object.(2)The aging test system is divided into three parts: the aging test system and the load carrier fixture.The test system mainly takes temperature control and optical power measurement as the research object.The aging system takes heat dissipation capacity as the research object.(3)The new aging test platform starts from the three directions of temperatude-controlled optical power test and loading fixture,and the temperature error of the test platform is reduced from 1.5 to 0.6.Measuring accuracy of output optical power from 50% to 98%;Temperature error of aging equipment decreases from 5 to 1;The yield of the aging test platform increased from 70% to 90%.(4)Aging test platform through reliability test performance,it is not difficult to find that after many experiments aging test platform up-down material difficulties and noise on the threshold current measurements can interfere with the two problems loading problem by manipulator with combination of MES system to solve,and the problem of noise using wavelet change processing data so as to reduce the noise interference.
Keywords/Search Tags:high speed chip, Aging test, Reliability, performance
PDF Full Text Request
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