Font Size: a A A

Design And Verification Of PMBus Interface For Power System Management

Posted on:2021-01-27Degree:MasterType:Thesis
Country:ChinaCandidate:L N YeFull Text:PDF
GTID:2428330626456058Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
In today's power electronics technology,the subsystem is no longer independent,but integrated into the entire system.Digital power technology helps reduce switching losses and manage complex sources of power consumption in the system.In order to optimize digital power systems,it is necessary to establish standardized communication method between power subsystems.One of the first standards for this type of communication was the SMBus specification introduced by Intel Corporation based on the I~2C bus.The PMBus specification is an improved version of the SMBus specification and is designed to allow digital control of power through a designated physical bus.Because the power consumption,margin and other related power tests in traditional power systems require manual changes to passive components and additional settings for each test case,the design of system-level power management is cumbersome.Digital power technology provides a cost-effective method for simplifying design.A bus slave controller is designed based on the PMBus specification,and its function is verified by the host communicating with it,and finally the physical layout of the digital integrated circuit is realized.Based on the PMBus specification,this article uses a top-down approach to design integrated circuits,uses Verilog hardware description language to design a bus slave controller.The Synopsys simulation compiler VCS is used to verify its function through communication with the master controller.Synthesize designs with Design Compile.Use StarRC to extract parasitic parameters.Then use PrimeTime to complete the static timing analysis(STA).Call pdk for physical layout verification.Perform design rule check(DRC)and layout and schematic consistency check(LVS).Finally,the chip layout GDS?file is generated to realize the physical layout of the digital integrated circuit.This design uses a script program,and the modification method is flexible and convenient,which shortens the design time.This way makes the module widely used.After verification,the working voltage of the module is 1.8V,and the maximum working frequency is 400kHz.The final design result is within the target parameter range,and the requirements for complex functional design are completed,which provides the possibility of improving the function and performance of digital power supplies.
Keywords/Search Tags:digital power, PMBus, Verilog, design, verification
PDF Full Text Request
Related items