Design Of Wideband Low Noise Amplifier For Globle Navigation Satelite Systems

In recent years,Global Navigation Satellite System?GNSS?has been widely used,such as car navigation,logistics tracking,emergency rescue,civil aviation,e-commerce,etc.It can provide all-weather and high-precision positioning,navigation and timing services for users.The GNSS system is not only an infrastructure for national security and economy,but also an important symbol of the comprehensive national strength.It is of great significance in politics,economy and military.The low noise amplifier?LNA?is an active device and core component which is located at the GNSS receiver RF front end,so it has a critical impact on the overall performance.However,the proposed design has not covered all frequencies of GNSS.In order to achieve fast,continuous and accurate positioning,the combined use of multiple navigation systems has become a trend,therefore,the L-band broadband LNA has become one of the research hotspots of satellite navigation chips.Considering the application requirements of GNSS receiver RF front-end for low noise amplifiers,this thesis studies L-band low noise amplifier based on CMOS technology.The main contents include:1.A cascaded wideband LNA composed of resistive negative feedback cascode structure and source follower was proposed based on UMC 0.18?m CMOS technology.The first stage of the amplifier expanded the bandwidth and provided freedom to reduce the matching difficulty and improved the linearity.The second stage adopted a noise canceling structure,which is mainly used to improve the noise and gain performance of the overall circuit.The post layout simulation results shown that the bandwidth is 1.13-1.65GHz and the noise figure reaches a minimum value of2.6dB at 1.13GHz,with a variation of 0.4dB over the entire bandwidth.Moreover,the scatter parameter simulation results indicated that the gain reaches a maximum value of 19.44dB at 1.26GHz,and the S₁₁&S₂₂ are both less than-10dB,achieving good impedance matching.2.Based on UMC 0.18?m CMOS process,the designed LNA was a novel structure which consists of resistor parallel feedback,inductor peaking cascode and source follower.The first stage of the amplifier achieved wideband input matching and very low noise figure to increase system sensitivity.The second stage was used to improve the reverse isolation of the overall circuit.The use of peaking inductance increased the bandwidth.The third stage useed a noise cancellation structure to improve circuit noise performance.The post layout simulation results shown that the bandwidth is 1-2GHz with the maximum gain of 15.08dB,and the minimum value of noise figure is 2.657dB.In the entire frequency bandwidth,S₁₁ was lower than-13dB,S₂₂ was lower than-11dB,so the input/output port impedance was well matched.3.Since the above process has no tape stage,an amplifier was designed based on CSMC 0.25?m CMOS technology.There is no inductance in the library while the design requires two different parameters of inductance,therefore two inductances were designed.The post layout simulation results shown that the bandwidth is1-1.85GHz and the noise figure reaches a minimum at 1GHz.Moreover,the scatter parameter simulation results indicated that the gain reaches a maximum of 15.61dB at1.55GHz and S₁₁&S₂₂ are less than-7dB,achieving good impedance matching.4.The Voltage Controlled Oscillator?VCO?is located at the next stage of the LNA to provide a stable local carrier signal for the GNSS receiver system.For the integrity of the GNSS receiver design,an LC VCO was designed based on the UMC0.18?m CMOS process.The negative resistance unit used a complementary structure of NMOS and PMOS cross-coupled pairs.The pre-simulation results shown that the phase noise at 1MHz frequency offset is-119dBc/Hz and the tuning range is1.469-1.642GHz.The DC power consumption of the circuit was 7.715dBm.