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Research On Multi-layer Cooperative Self-healing Technology Of On-chip Interconnect Subsystem

Posted on:2021-05-25Degree:MasterType:Thesis
Country:ChinaCandidate:G LuFull Text:PDF
GTID:2428330623468634Subject:Engineering
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Network-on-a-chip,as a new communication architecture for multi-core systems on a chip,meets the multi-connection and high-concurrent communication requirements.As integrated circuits develop into the deep and nano stages,failures caused by aging of devices occur frequently and are reflected in the blocking of communication functions,and ultimately make the on-chip multi-core system fail.The on-chip interconnect subsystem is the constituent unit of the on-chip network,the actual implementation of its communication functions,and the carrier of most failures.In order to be able to restore the communication function after a fault occurs,extend the service life of the on-chip multi-core system,and improve its reliability,the self-healing technology of the on-chip interconnect subsystem needs to be studied.The research on multi-layer cooperative self-healing technology of the on-chip interconnect subsystem made in this paper follows two research routes,which are the local research route around the actual composition of the on-chip interconnect subsystem,focusing on the design of modules and algorithms,and the interconnection between systems.Features and communications are realized by a global research route focusing on mechanism establishment and program research.The two research routes are parallel.First of all,this paper refines the transmission line from the research object to each component of the system.A new transmission line level research area is divided into the on-chip interconnect subsystems.The granularity of the fault information is further established based on the impact size and physical range.Functional granularity and basic granularity,from which three fault detection windows are obtained and the faults in each detection window are modeled.Next,three self-healing levels are established according to the correspondence between the fault model and the on-chip interconnected subsystem level: hardware layer function self-healing level,transport layer algorithm self-healing level,and system layer topology self-healing level.In the research of this paper,the technology to realize selfhealing at each level is mainly composed of three parts,namely fault information perception,fault tolerance processing and feature mechanism mining.For the three parts,this round of independent research and verification has been carried out in turn: 1.Using the port characteristics to propose an internal and external multi-end fault awareness mechanism;2.Combining streamlined backup,flybridge design and configurable multiple algorithms to propose a composite fault tolerance Design;3.Propose a multilayer collaborative self-healing mechanism by tapping the commonality of design.At the same time,in the design process,this paper nests method comparison and theoretical analysis in various parts,and summarizes the theoretical conditions resulting from multi-layer cooperative self-healing of on-chip interconnected subsystems,namely: self-healing layered theory,Multi-connection fault perception theory,compound fault tolerance method theory,and cooperative element theory.The simulation results show that the multi-layer cooperative self-healing design of the on-chip interconnect subsystem in this paper can maintain the network throughput rate when the coverage of the faulty node reaches 100%,that is,all 16 nodes in the network fail,under the high packet injection environment.And the average packet delay is reduced compared to the failure-free state,the maximum drop is more than 3%;at the same time,in the MTTF representing reliability quantization,this design is improved by 75% compared to the general network;and the resource overhead is only increased by 6.51%.
Keywords/Search Tags:On-chip interconnect subsystem, self-healing technology, multi-layer collaboration, composite fault tolerance
PDF Full Text Request
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