A Research Of High Efficiency Power Amplifier

In the development of wireless communications,RF power amplifiers have always been one of the important components of the transceiver link.Under the new generation of wireless communication concepts such as the 5G and Internet of Things,more require-ments are placed on traditional indicators such as output power,efficiency,and linearity of RF power amplifiers.In the application,the microwave monolithic integrated circuit MMIC has received extensive attention in the communication field due to its advantages of high integration and low cost.Therefore,how to achieve a good index power am-plifier in MMIC has become a research hotspot in recent years.In the field of MMIC,silicon-based integrated circuits often cannot match the performance of compound semi-conductors such as GaAs and InP.However,the emergence of BiCMOS technology not only maintains the advantages of silicon-based low cost and can be integrated with digital circuits,but also improves RF performance.It has become a compromise between CMOS and compound semiconductors in MMICs.Therefore,this paper will select BiCMOS technology as the basis Design a power amplifier.At the same time,the power amplifier in the communication link is an important breakthrough in reducing the overall system power consumption because of its high power consumption characteristics,so designing a high efficiency power amplifier is also of great significance.Thanks to the rapid devel-opment of digital signal processing technology,the requirements for the linearity index of the power amplifier have been further reduced.Traditional linear power amplifiers such as Class A and AB amplifiers have gradually given way to non-linear power amplifiers such as Class E and F amplifiers in the research of high efficiency power amplifiers due to their low theoretical efficiency.This thesis will focus on the design method of non-linear power amplifier,and design and test an inverse Class F power amplifier.The research focus of this paper is as follows:First,for how to maximize the power transmission between the front and rear stages of the power amplifier,this article adopts the design idea of Load-pull,by using Load-pull technology,we get the optimal load impedance of the front-stage drive amplifier which is used to obtain the best power output and perform inter-stage matching.Simulation results show that the highest output power of the driver stage amplifier is about 10dBm? Second,to get rid of the low efficiency of the traditional linear amplifier,the amplifier stage of this paper uses a switch-type power amplifier design method,which improves the power added efficiency of the power amplifier.Simulation results show that the highest power added efficiency of the power amplifier in the operating frequency band can reach about40%.The test results show that the maximum power efficiency of the power amplifier in the operating frequency band is 36%.Third,for the output harmonic control required by the inverse F power amplifier,the LC resonant network is used as the basic unit.In order to optimize the effect of harmonic control,the electromagnetic field simulation method was used to iteratively modify the circuit parameters.In summary,this thesis focuses on research hotspots and engineering needs,designed and taped out a 0.13μm BiCMOS process power amplifier.The working frequency of the power amplifier is 19-24GHz and its small signal gain greater than 14 dB,output 1dB compression point higher than 15 dBm,with additional efficiency higher than 30 %.In the design,a two-level cascade topology is used,and stability compensation circuits,load trac-tion technology,and harmonic control network design are used to achieve high-efficiency and high-gain power amplifier characteristics.