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An FPGA Accelerated IP Design And Verification Base On XNOR Algorithm

Posted on:2019-09-27Degree:MasterType:Thesis
Country:ChinaCandidate:Y SuFull Text:PDF
GTID:2428330623450636Subject:Engineering
Abstract/Summary:PDF Full Text Request
With the emergence of AlexNet in 2012,deep learning methods using convolutional neural networks have gradually become a popular direction for image processing,and there have been many practical deployments.Various neural network deployment platforms,including the current major deployment platform GPU,have their own shortcomings.GPU power consumption is too high and the price is expensive;CPU computing power is difficult to achieve a good effect of neural network deployment;ASIC is difficult to adapt to the iterative update of the currently not fully mature neural network model.The FPGA configuration is flexible and can provide powerful parallel processing capabilities.However,compared with the GPU,there is a disadvantage that the floating-point computing capability is relatively weak and the development cycle is long.This paper aims at these disadvantages of FPGA,proposes an FPGA IP core implementation method for XNOR algorithm,and has excellent performance.The design adopts the XILINX HLS method,which greatly improves the portability and reduces the FPGA development cycle.The XNOR algorithm's neural network uses single-bit data to represent weights and inputs when the network accuracy is good.While greatly reducing the storage space required for its weight,the operations need only be performed through logical operations.This paper first analyzes the calculation steps of various types of layers in the convolutional neural network,and analyzes the XNOR algorithm implementation and training steps.Then summarizes the structural characteristics of the neural network using XNOR algorithm,and extracts the key parameters in the design.Finally,accelerated IP was designed to obtain performance equivalent to current mainstream accelerators.This article uses this method to verify the validity of XNOR's AlexNet.Then use XNOR algorithm to transform LeNet and apply it on the hardware platform including DSP and FPGA to verify the effectiveness and portability of this design method,and achieved good results.
Keywords/Search Tags:FPGA, Acceleration IP, Neural network, XNOR algorithm
PDF Full Text Request
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