The Design Of An Ultra-Low-Power DLS Ring Oscillator Based On Digital Tunable

With the advent of 5G communication and big data era,data transmission between various wireless Internet of things and communication infrastructure is closer,and these communication devices are driven by clocks,and clock circuit plays a very important role in the chip.Oscillator is a common clock circuit,there are many kinds of it.However,RC oscillators and ring oscillators are the most commonly used in the field of low power,low cost and integrable chips.The aim of this paper is to design an extremely low-power Dynamic Leakage Suppression(DLS)ring oscillator,which can generate an oscillation frequency of 32.768 KHZ.And improve the accuracy of the output frequency by means of digital circuit calibration,so as to improve the stability.The main work of this paper includes:Firstly,a DLS ring oscillator with adjustable frequency is designed,its frequency modulation is divided into coarse and fine tones.Among them,the 6-bit DAC array is used as a coarse-modulated circuit,which changes the output voltage through the switching of the capacitor to change the gate voltage of the DLS logic circuit,and controls the change of the current to adjust the frequency.As a fine-tuning circuit,the 6-bit capacitor array adjusts the frequency by changing the total capacitance of the capacitor array.Secondly,a RC oscillator whose output frequency varies less than 1% with voltage,temperature and process deviation is designed,which is used as the frequency reference source to calibrate the DLS ring oscillator.Because the power consumption of RC oscillator is large,its working state is wake up periodically and close immediately after calibration.Then,the digital calibration circuit is designed by verilog,and the digital analog hybrid simulation is carried out after the correctness of the digital circuit is simply verified.Finally,the overall layout design is completed and the post-simulation verification is carried out.In this paper,the layout design and post-simulation verification of the oscillator are carried out on the virtuoso based on the process of TSMC 180 nm.The simulation results show that: when the power supply voltage is 600 mV,the temperature is 27? and the process Angle is TT,the output frequency after digital calibration is 33.1KHZ and the power consumption is 5.47 nW.Under the condition that the power supply voltage is 600 mV and the process Angle is TT,when the temperature changes from-10? to 80?,the output frequency deviation of the oscillator is 155ppm/?.Under the condition that the temperature is 27? and the process Angle is TT,when the power supply voltage changes from 0.5V to 0.9V,the output frequency deviation of the oscillator is 2.25% /V.