Research And Design Of A Self-Timed Ring Based True Random Number Generator

True random number generators provide the unpredictable data required for the encryption operation of various chips.The randomness of the random numbers directly affects the security and anti-aggression of the encryption algorithm.Therefore,the stability,robustness and randomness of the random number generator are particularly important.A true random number generator is composed of entropy generation,entropy extraction and post-processing circuit.The core of the design is to realize a high-reliability entropy source and an accurate entropy extraction circuit.According to the design requirements,based on the study of various high-reliability entropy sources,this thesis proposes a design method of a true random number generator based on self-timed ring.The self-timed ring has good stability,and the oscillation mode and frequency can be controlled by setting the initial state,thereby improving the speed of the reliable entropy of the oscillator ring output.Aiming at the proposed entropy source structure,this thesis also proposes a high-precision sampling entropy extraction module,which improves the extraction efficiency of unit entropy and ensures the reliability of extraction.The true random number generator based on self-timed ring proposed in this thesis is designed and verified on Xilinx Virtex-5 FPGA.The Muller element of the self-timed ring is implemented by the LUT on the board,and the sampling module is implemented using fast delay chains cascaded by CARRY4 s.In the design,the circuit is manually laid out and optimized to reduce the interference of online delay on the circuit.The random numbers generated by the circuit are output using the UART serial port and passed the NIST random number test.The circuit achieves an output rate of 150 Mbps.In order to integrate the proposed random number generator into the SoC system,this thesis adds interfaces and hardware blocks to the random number generator,then simulates and verifies it in the ARM TrustZone environment.The results show that the random number generator proposed in the thesis has reliable results and high output speed,and is suitable for application in SoC system.