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Research And Implementation Of High-speed Modulation And Demodulation Technology Based On ZYNQ

Posted on:2021-05-22Degree:MasterType:Thesis
Country:ChinaCandidate:Z GuiFull Text:PDF
GTID:2428330611998262Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the advent of the information age,the requirements for information rates in various fields are becoming higher and higher,and traditional communication systems have been unable to provide sufficiently high information transmission rates to meet the current high-speed information transmission requirements.Therefore,it is necessary to design a modem system for high-rate information.In this paper,the key technologies such as parallel demodulation architecture design,timing synchronization,carrier synchronization and their hardware implementation in high-speed demodulation system are studied in order to realize a modem system suitable for high-speed data transmission.Firstly,for high-speed modems,the information rate that can be processed is limited by the main clock frequency of the hardware platform,which requires that the traditional serial demodulation structure be changed to a parallel demodulation structure.This paper takes the low-IF digital demodulation structure as a prototype,and uses the APRX architecture to transform the traditional serial low-IF digital demodulation structure into a parallel low-IF digital demodulation structure suitable for processing high-speed data.High-speed information,and simplify and improve all parts of the system.Secondly,this paper chooses feedback closed loop as the framework of timing synchronization,and analyzes and compares the timing synchronization error estimation algorithms of early and late gate,Gardner,O&M in detail,and finally selects the O&M algorithm that is easier to implement by hardware and independent of carrier synchronization.Through derivation,the parallel implementation structure of O&M algorithm and timing error correction is obtained.Finally,the effectiveness of the algorithm is verified and the hardware logic design is completed on FPGA.Then,the paper analyzes four carrier synchronization algorithms based on decision feedback loop,direct decision method,simplified constellation method,polarity decision method and frequency and phase discrimination method.Finally,the frequency and phase discrimination method with larger frequency offset acquisition and better phase tracking ability is selected.For the parallel implementation of the algorithm,a structure based on average equal compensation is designed and the functional verification of the entire carrier synchronization is completed.Finally,the above demodulation architecture and timing synchronization and carrier synchronization algorithms are transplanted to the ZYNQ platform.The algorithm suitable for hardware implementation is implemented on the FPGA side,and the data processed on the FPGA side is transmitted to the ARM side through the internal highspeed channel of ZYNQ for subsequent processing.And each module of the entire modem system has been debugged and tested.The results show that the system has good performance.
Keywords/Search Tags:High-speed demodulation, timing synchronization, carrier synchronization, APRX, ZYNQ
PDF Full Text Request
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